mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 20:56:16 +09:00
2f16ac9df4
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Francois Bedard <fbedard@synopsys.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
48 lines
872 B
C
48 lines
872 B
C
/*
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* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arcregs.h>
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#include <asm/cache.h>
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DECLARE_GLOBAL_DATA_PTR;
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int arch_cpu_init(void)
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{
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#ifdef CONFIG_SYS_ICACHE_OFF
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icache_disable();
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#else
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icache_enable();
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invalidate_icache_all();
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#endif
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flush_dcache_all();
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#ifdef CONFIG_SYS_DCACHE_OFF
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dcache_disable();
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#else
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dcache_enable();
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#endif
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timer_init();
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/* In simulation (ISS) "CHIPID" and "ARCNUM" are all "ff" */
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if ((read_aux_reg(ARC_AUX_IDENTITY) & 0xffffff00) == 0xffffff00)
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gd->arch.running_on_hw = 0;
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else
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gd->arch.running_on_hw = 1;
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gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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int arch_early_init_r(void)
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{
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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