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c978b52410
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
9 lines
130 B
Makefile
9 lines
130 B
Makefile
#
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# SPDX-License-Identifier: GPL-2.0+
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#
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head-y := arch/xtensa/cpu/start.o
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libs-y += arch/xtensa/cpu/
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libs-y += arch/xtensa/lib/
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