mirror of
https://github.com/brain-hackers/u-boot-brain
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0cc2a07879
Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
54 lines
876 B
C
54 lines
876 B
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2019-2020 PHYTEC Messtechnik GmbH
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* Author: Teresa Remmet <t.remmet@phytec.de>
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*/
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#include <common.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/io.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <env.h>
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#include <miiphy.h>
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DECLARE_GLOBAL_DATA_PTR;
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static int setup_fec(void)
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{
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struct iomuxc_gpr_base_regs *gpr =
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(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
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/* Use 125M anatop REF_CLK1 for ENET1, not from external */
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clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
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return 0;
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}
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int board_init(void)
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{
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setup_fec();
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return 0;
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}
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int board_mmc_get_env_dev(int devno)
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{
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return devno;
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}
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int board_late_init(void)
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{
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switch (get_boot_device()) {
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case SD2_BOOT:
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env_set_ulong("mmcdev", 1);
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break;
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case MMC3_BOOT:
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env_set_ulong("mmcdev", 2);
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break;
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default:
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break;
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}
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return 0;
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}
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