mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
6d7dacf726
mmc: - Fix dt property handling via generic function clk: - Fix versal watchdog clock setting nand: - Fix zynq nand command comparison xilinx: - Enable ubifs - Sync board_late_init configurations with initrd_high setup - Make custom distro boot more verbose zynq: - Kconfig alignments - Fix nand cse configuration zynqmp: - Fix zcu104 low level qspi configuration - Small DT updates -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXqp9yAAKCRDKSWXLKUoM IXiuAKCLjBKGQ+o+BkJMvjbydF1JgFdXpwCffFPRe6dTkPsLZhpzW/YQMrjidtg= =CQTb -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2020.07-rc2 mmc: - Fix dt property handling via generic function clk: - Fix versal watchdog clock setting nand: - Fix zynq nand command comparison xilinx: - Enable ubifs - Sync board_late_init configurations with initrd_high setup - Make custom distro boot more verbose zynq: - Kconfig alignments - Fix nand cse configuration zynqmp: - Fix zcu104 low level qspi configuration - Small DT updates Signed-off-by: Tom Rini <trini@konsulko.com>
105 lines
2.6 KiB
Plaintext
105 lines
2.6 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_SPL_SYS_DCACHE_OFF=y
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CONFIG_ARCH_ZYNQ=y
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CONFIG_SYS_TEXT_BASE=0x4000000
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
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CONFIG_DM_GPIO=y
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CONFIG_SPL_STACK_R_ADDR=0x200000
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CONFIG_SPL=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SYS_CUSTOM_LDSCRIPT=y
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CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
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CONFIG_FIT=y
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CONFIG_FIT_SIGNATURE=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_FIT_PRINT=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_LEGACY_IMAGE_FORMAT=y
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CONFIG_USE_PREBOOT=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_FPGA_SUPPORT=y
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CONFIG_SPL_OS_BOOT=y
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CONFIG_SPL_SPI_LOAD=y
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# CONFIG_BOOTM_NETBSD is not set
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_THOR_DOWNLOAD=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_DFU=y
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CONFIG_CMD_FPGA_LOADBP=y
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CONFIG_CMD_FPGA_LOADFS=y
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CONFIG_CMD_FPGA_LOADMK=y
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CONFIG_CMD_FPGA_LOADP=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MTD=y
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CONFIG_CMD_NAND_LOCK_UNLOCK=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_CMD_MTDPARTS_SPREAD=y
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CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
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CONFIG_CMD_UBI=y
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CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
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CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zybo zynq-zybo-z7 zynq-dlc20-rev1.0"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_NETCONSOLE=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_FPGA_XILINX=y
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CONFIG_FPGA_ZYNQPL=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_CADENCE=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MISC=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x0
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CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ZYNQ=y
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_CFI_FLASH=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_NAND_ZYNQ=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_ISSI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_XILINX=y
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CONFIG_MII=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_ZYNQ_SERIAL=y
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CONFIG_ZYNQ_SPI=y
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CONFIG_ZYNQ_QSPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
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CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
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CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
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CONFIG_CI_UDC=y
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_USB_FUNCTION_THOR=y
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CONFIG_DISPLAY=y
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CONFIG_SPL_GZIP=y
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