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![Simon Glass](/assets/img/avatar_default.png)
Add SCI and power-state definitions required by ACPI tables. Fix the license to match the original source file. Als update the guard on acpi_pmc.h to avoid an error when buiding ASL. Signed-off-by: Simon Glass <sjg@chromium.org>
200 lines
4.9 KiB
C
200 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2019 Google LLC
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*/
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#ifndef __ACPI_PMC_H
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#define __ACPI_PMC_H
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#ifndef __ASSEMBLY__
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enum {
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GPE0_REG_MAX = 4,
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};
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enum {
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PM1_STS = 0x00,
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PM1_EN = 0x02,
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PM1_CNT = 0x04,
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PM1_TMR = 0x08,
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GPE0_STS = 0x20,
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GPE0_EN = 0x30,
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};
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/**
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* struct acpi_pmc_upriv - holds common data for the x86 PMC
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*
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* @pmc_bar0: Base address 0 of PMC
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* @pmc_bar1: Base address 2 of PMC
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* @acpi_base: Base address of ACPI block
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* @pm1_sts: PM1 status
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* @pm1_en: PM1 enable
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* @pm1_cnt: PM1 control
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* @gpe_cfg: Address of GPE_CFG register
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* @gpe0_dwx_mask: Mask to use for each GPE0 (typically 7 or 0xf)
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* @gpe0_dwx_shift_base: Base shift value to use for GPE0 (0 or 4)
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* @gpe0_sts_req: GPE0 status register offset
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* @gpe0_en_req: GPE0 enable register offset
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* @gpe0_sts: GPE0 status values
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* @gpe0_en: GPE0 enable values
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* @gpe0_dw: GPE0 DW values
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* @gpe0_count: Number of GPE0 registers
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* @tco1_sts: TCO1 status
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* @tco2_sts: TCO2 status
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* @prsts: Power and reset status
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* @gen_pmcon1: General power mgmt configuration 1
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* @gen_pmcon2: General power mgmt configuration 2
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* @gen_pmcon3: General power mgmt configuration 3
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*/
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struct acpi_pmc_upriv {
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void *pmc_bar0;
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void *pmc_bar2;
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u32 acpi_base;
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u16 pm1_sts;
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u16 pm1_en;
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u32 pm1_cnt;
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u32 *gpe_cfg;
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u32 gpe0_dwx_mask;
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u32 gpe0_dwx_shift_base;
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u32 gpe0_sts_reg;
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u32 gpe0_en_reg;
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u32 gpe0_sts[GPE0_REG_MAX];
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u32 gpe0_en[GPE0_REG_MAX];
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u32 gpe0_dw[GPE0_REG_MAX];
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int gpe0_count;
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u16 tco1_sts;
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u16 tco2_sts;
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u32 prsts;
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u32 gen_pmcon1;
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u32 gen_pmcon2;
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u32 gen_pmcon3;
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};
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struct acpi_pmc_ops {
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/**
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* init() - Set up the PMC for use
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*
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* This reads the current state of the PMC. Most of the state is read
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* automatically by the uclass since it is common.
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*
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* This is optional.
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*
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* @dev: PMC device to use
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* @return 0 if OK, -ve on error
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*/
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int (*init)(struct udevice *dev);
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/**
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* prev_sleep_state() - Get the previous sleep state (optional)
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*
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* This reads various state registers and returns the sleep state from
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* which the system woke. If this method is not provided, the uclass
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* will return a calculated value.
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*
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* This is optional.
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*
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* @dev: PMC device to use
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* @prev_sleep_state: Previous sleep state as calculated by the uclass.
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* The method can use this as the return value or calculate its
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* own.
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*
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* @return enum acpi_sleep_state indicating the previous sleep state
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* (ACPI_S0, ACPI_S3 or ACPI_S5), or -ve on error
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*/
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int (*prev_sleep_state)(struct udevice *dev, int prev_sleep_state);
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/**
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* disable_tco() - Disable the timer/counter
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*
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* Disables the timer/counter in the PMC
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*
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* This is optional.
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*
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* @dev: PMC device to use
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* @return 0
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*/
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int (*disable_tco)(struct udevice *dev);
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/**
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* global_reset_set_enable() - Enable/Disable global reset
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*
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* Enable or disable global reset. If global reset is enabled, both hard
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* reset and soft reset will trigger global reset, where both host and
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* TXE are reset. This is cleared on cold boot, hard reset, soft reset
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* and Sx.
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*
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* This is optional.
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*
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* @dev: PMC device to use
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* @enable: true to enable global reset, false to disable
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* @return 0
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*/
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int (*global_reset_set_enable)(struct udevice *dev, bool enable);
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};
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#define acpi_pmc_get_ops(dev) ((struct acpi_pmc_ops *)(dev)->driver->ops)
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/**
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* init() - Set up the PMC for use
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*
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* This reads the current state of the PMC. This reads in the common registers,
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* then calls the device's init() method to read the SoC-specific registers.
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*
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* @return 0 if OK, -ve on error
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*/
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int pmc_init(struct udevice *dev);
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/**
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* pmc_prev_sleep_state() - Get the previous sleep state
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*
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* This reads various state registers and returns the sleep state from
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* which the system woke.
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*
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* @return enum acpi_sleep_state indicating the previous sleep state
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* (ACPI_S0, ACPI_S3 or ACPI_S5), or -ve on error
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*/
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int pmc_prev_sleep_state(struct udevice *dev);
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/**
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* pmc_disable_tco() - Disable the timer/counter
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*
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* Disables the timer/counter in the PMC
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*
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* @dev: PMC device to use
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* @return 0
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*/
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int pmc_disable_tco(struct udevice *dev);
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/**
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* pmc_global_reset_set_enable() - Enable/Disable global reset
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*
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* Enable or disable global reset. If global reset is enabled, both hard
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* reset and soft reset will trigger global reset, where both host and
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* TXE are reset. This is cleared on cold boot, hard reset, soft reset
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* and Sx.
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*
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* @dev: PMC device to use
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* @enable: true to enable global reset, false to disable
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* @return 0
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*/
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int pmc_global_reset_set_enable(struct udevice *dev, bool enable);
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int pmc_ofdata_to_uc_platdata(struct udevice *dev);
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int pmc_disable_tco_base(ulong tco_base);
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void pmc_dump_info(struct udevice *dev);
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/**
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* pmc_gpe_init() - Set up general-purpose events
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*
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* @dev: PMC device
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* @return 0 if OK, -ve on error
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*/
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int pmc_gpe_init(struct udevice *dev);
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#endif /* !__ASSEMBLY__ */
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#endif
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