mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-15 15:46:16 +09:00
46b5ccbfe2
When booting from Flash, the Integrator remaps its flash memory from 0x24000000 to 0x00000000, and starts executing it at 0x00000000. This ROM thus hides the RAM underneath and first 0x40000 bytes of the memory cannot be tested by get_ram_size(). So let's test from 0x40000 to the end of detected memory instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
149 lines
3.6 KiB
C
149 lines
3.6 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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*
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* (C) Copyright 2003
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* Texas Instruments, <www.ti.com>
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* Kshitij Gupta <Kshitij@ti.com>
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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void peripheral_power_enable (void);
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#if defined(CONFIG_SHOW_BOOT_PROGRESS)
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void show_boot_progress(int progress)
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{
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printf("Boot reached stage %d\n", progress);
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}
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#endif
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#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
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/*
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* Miscellaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* arch number of Integrator Board */
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#ifdef CONFIG_ARCH_CINTEGRATOR
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gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
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#else
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gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
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#endif
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x00000100;
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gd->flags = 0;
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#ifdef CONFIG_CM_REMAP
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extern void cm_remap(void);
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cm_remap(); /* remaps writeable memory to 0x00000000 */
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#endif
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icache_enable ();
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return 0;
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}
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int misc_init_r (void)
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{
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#ifdef CONFIG_PCI
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pci_init();
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#endif
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setenv("verify", "n");
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return (0);
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}
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/*
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* The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot
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* from there, which means we cannot test the RAM underneath the ROM at this
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* point. It will be unmapped later on, when we are executing from the
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* relocated in RAM U-Boot. We simply assume that this RAM is usable if the
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* RAM on higher addresses works fine.
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*/
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#define REMAPPED_FLASH_SZ 0x40000
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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#ifdef CONFIG_CM_SPD_DETECT
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{
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extern void dram_query(void);
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unsigned long cm_reg_sdram;
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unsigned long sdram_shift;
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dram_query(); /* Assembler accesses to CM registers */
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/* Queries the SPD values */
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/* Obtain the SDRAM size from the CM SDRAM register */
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cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
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/* Register SDRAM size
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*
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* 0xXXXXXXbbb000bb 16 MB
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* 0xXXXXXXbbb001bb 32 MB
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* 0xXXXXXXbbb010bb 64 MB
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* 0xXXXXXXbbb011bb 128 MB
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* 0xXXXXXXbbb100bb 256 MB
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*
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*/
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sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
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gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
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REMAPPED_FLASH_SZ,
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0x01000000 << sdram_shift);
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}
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#else
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gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
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REMAPPED_FLASH_SZ,
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PHYS_SDRAM_1_SIZE);
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#endif /* CM_SPD_DETECT */
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/* We only have one bank of RAM, set it to whatever was detected */
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gd->bd->bi_dram[0].size = gd->ram_size;
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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rc += pci_eth_init(bis);
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return rc;
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}
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#endif
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