mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-10 21:26:19 +09:00
4d66668300
Add support of 2-stage NAND/SPI/SD boot loader using SPL framework. PBL initializes the internal CPC-SRAM and copy SPL(160K) to it, SPL further initializes DDR using SPD and environment and copy u-boot(768K) from SPI/SD/NAND to DDR, finally SPL transfers control to u-boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
19 lines
339 B
Makefile
19 lines
339 B
Makefile
#
|
|
# Copyright 2014 Freescale Semiconductor, Inc.
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
ifdef CONFIG_SPL_BUILD
|
|
obj-y += spl.o
|
|
else
|
|
obj-$(CONFIG_T2080RDB) += t208xrdb.o
|
|
obj-$(CONFIG_T2080RDB) += eth_t208xrdb.o
|
|
obj-$(CONFIG_T2080RDB) += cpld.o
|
|
obj-$(CONFIG_PCI) += pci.o
|
|
endif
|
|
|
|
obj-y += ddr.o
|
|
obj-y += law.o
|
|
obj-y += tlb.o
|