mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 13:46:17 +09:00
629d6b32d6
Add support for Freescale T2080/T2081 SoC. T2080 includes the following functions and features: - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T2080 and T2081: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
113 lines
3.2 KiB
Makefile
113 lines
3.2 KiB
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002,2003 Motorola Inc.
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# Xianghua Xiao,X.Xiao@motorola.com
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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MINIMAL=
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_INIT_MINIMAL
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MINIMAL=y
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endif
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endif
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extra-y = start.o resetvec.o
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ifdef MINIMAL
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obj-y += cpu_init_early.o tlb.o spl_minimal.o
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else
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obj-$(CONFIG_MP) += release.o
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obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o
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obj-$(CONFIG_CPM2) += commproc.o
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obj-$(CONFIG_CPM2) += ether_fcc.o
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obj-$(CONFIG_OF_LIBFDT) += fdt.o
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obj-$(CONFIG_FSL_CORENET) += liodn.o
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obj-$(CONFIG_MP) += mp.o
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obj-$(CONFIG_PCI) += pci.o
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obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
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# various SoC specific assignments
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obj-$(CONFIG_PPC_P2041) += p2041_ids.o
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obj-$(CONFIG_PPC_P3041) += p3041_ids.o
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obj-$(CONFIG_PPC_P4080) += p4080_ids.o
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obj-$(CONFIG_PPC_P5020) += p5020_ids.o
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obj-$(CONFIG_PPC_P5040) += p5040_ids.o
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obj-$(CONFIG_PPC_T4240) += t4240_ids.o
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obj-$(CONFIG_PPC_T4160) += t4240_ids.o
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obj-$(CONFIG_PPC_B4420) += b4860_ids.o
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obj-$(CONFIG_PPC_B4860) += b4860_ids.o
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obj-$(CONFIG_PPC_T1040) += t1040_ids.o
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obj-$(CONFIG_PPC_T1042) += t1040_ids.o
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obj-$(CONFIG_PPC_T1020) += t1040_ids.o
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obj-$(CONFIG_PPC_T1022) += t1040_ids.o
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obj-$(CONFIG_PPC_T2080) += t2080_ids.o
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obj-$(CONFIG_PPC_T2081) += t2080_ids.o
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obj-$(CONFIG_QE) += qe_io.o
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obj-$(CONFIG_CPM2) += serial_scc.o
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obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
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obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
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# SoC specific SERDES support
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obj-$(CONFIG_PPC_C29X) += c29x_serdes.o
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obj-$(CONFIG_MPC8536) += mpc8536_serdes.o
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obj-$(CONFIG_MPC8544) += mpc8544_serdes.o
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obj-$(CONFIG_MPC8548) += mpc8548_serdes.o
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obj-$(CONFIG_MPC8568) += mpc8568_serdes.o
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obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
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obj-$(CONFIG_MPC8572) += mpc8572_serdes.o
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obj-$(CONFIG_P1010) += p1010_serdes.o
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obj-$(CONFIG_P1011) += p1021_serdes.o
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obj-$(CONFIG_P1012) += p1021_serdes.o
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obj-$(CONFIG_P1013) += p1022_serdes.o
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obj-$(CONFIG_P1014) += p1010_serdes.o
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obj-$(CONFIG_P1017) += p1023_serdes.o
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obj-$(CONFIG_P1020) += p1021_serdes.o
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obj-$(CONFIG_P1021) += p1021_serdes.o
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obj-$(CONFIG_P1022) += p1022_serdes.o
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obj-$(CONFIG_P1023) += p1023_serdes.o
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obj-$(CONFIG_P1024) += p1021_serdes.o
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obj-$(CONFIG_P1025) += p1021_serdes.o
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obj-$(CONFIG_P2010) += p2020_serdes.o
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obj-$(CONFIG_P2020) += p2020_serdes.o
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obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
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obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
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obj-$(CONFIG_PPC_P4080) += p4080_serdes.o
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obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
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obj-$(CONFIG_PPC_P5040) += p5040_serdes.o
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obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
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obj-$(CONFIG_PPC_T4160) += t4240_serdes.o
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obj-$(CONFIG_PPC_B4420) += b4860_serdes.o
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obj-$(CONFIG_PPC_B4860) += b4860_serdes.o
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obj-$(CONFIG_BSC9132) += bsc9132_serdes.o
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obj-$(CONFIG_PPC_T1040) += t1040_serdes.o
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obj-$(CONFIG_PPC_T1042) += t1040_serdes.o
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obj-$(CONFIG_PPC_T1020) += t1040_serdes.o
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obj-$(CONFIG_PPC_T1022) += t1040_serdes.o
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obj-$(CONFIG_PPC_T2080) += t2080_serdes.o
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obj-$(CONFIG_PPC_T2081) += t2080_serdes.o
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obj-y += cpu.o
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obj-y += cpu_init.o
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obj-y += cpu_init_early.o
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obj-y += interrupts.o
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obj-y += speed.o
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obj-y += tlb.o
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obj-y += traps.o
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# Stub implementations of cache management functions for USB
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obj-y += cache.o
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endif # not minimal
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