mirror of
https://github.com/brain-hackers/u-boot-brain
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4684a7a43a
Adds support for Network Interface controllers found on OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
120 lines
2.6 KiB
C
120 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2018 Marvell International Ltd.
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*/
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#ifndef __RVU_H__
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#define __RVU_H__
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#include <asm/arch/csrs/csrs-rvu.h>
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#define ALIGNED __aligned(CONFIG_SYS_CACHELINE_SIZE)
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#define Q_SIZE_16 0ULL /* 16 entries */
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#define Q_SIZE_64 1ULL /* 64 entries */
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#define Q_SIZE_256 2ULL
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#define Q_SIZE_1K 3ULL
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#define Q_SIZE_4K 4ULL
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#define Q_SIZE_16K 5ULL
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#define Q_SIZE_64K 6ULL
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#define Q_SIZE_256K 7ULL
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#define Q_SIZE_1M 8ULL /* Million entries */
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#define Q_SIZE_MIN Q_SIZE_16
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#define Q_SIZE_MAX Q_SIZE_1M
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#define Q_COUNT(x) (16ULL << (2 * (x)))
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#define Q_SIZE(x, n) ((ilog2(x) - (n)) / 2)
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/* Admin queue info */
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/* Since we intend to add only one instruction at a time,
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* keep queue size to it's minimum.
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*/
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#define AQ_SIZE Q_SIZE_16
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/* HW head & tail pointer mask */
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#define AQ_PTR_MASK 0xFFFFF
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struct qmem {
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void *base;
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dma_addr_t iova;
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size_t alloc_sz;
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u32 qsize;
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u8 entry_sz;
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};
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struct admin_queue {
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struct qmem inst;
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struct qmem res;
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};
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struct rvu_af {
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struct udevice *dev;
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void __iomem *af_base;
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struct nix_af *nix_af;
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};
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struct rvu_pf {
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struct udevice *dev;
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struct udevice *afdev;
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void __iomem *pf_base;
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struct nix *nix;
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u8 pfid;
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int nix_lfid;
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int npa_lfid;
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};
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/**
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* Store 128 bit value
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*
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* @param[out] dest pointer to destination address
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* @param val0 first 64 bits to write
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* @param val1 second 64 bits to write
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*/
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static inline void st128(void *dest, u64 val0, u64 val1)
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{
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__asm__ __volatile__("stp %x[x0], %x[x1], [%[pm]]" :
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: [x0]"r"(val0), [x1]"r"(val1), [pm]"r"(dest)
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: "memory");
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}
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/**
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* Load 128 bit value
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*
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* @param[in] source pointer to 128 bits of data to load
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* @param[out] val0 first 64 bits of data
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* @param[out] val1 second 64 bits of data
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*/
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static inline void ld128(const u64 *src, u64 *val0, u64 *val1)
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{
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__asm__ __volatile__ ("ldp %x[x0], %x[x1], [%[pm]]" :
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: [x0]"r"(*val0), [x1]"r"(*val1), [pm]"r"(src));
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}
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void qmem_free(struct qmem *q);
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int qmem_alloc(struct qmem *q, u32 qsize, size_t entry_sz);
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/**
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* Allocates an admin queue for instructions and results
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*
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* @param aq admin queue to allocate for
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* @param qsize Number of entries in the queue
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* @param inst_size Size of each instruction
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* @param res_size Size of each result
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*
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* @return -ENOMEM on error, 0 on success
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*/
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int rvu_aq_alloc(struct admin_queue *aq, unsigned int qsize,
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size_t inst_size, size_t res_size);
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/**
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* Frees an admin queue
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*
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* @param aq Admin queue to free
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*/
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void rvu_aq_free(struct admin_queue *aq);
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void rvu_get_lfid_for_pf(int pf, int *nixid, int *npaid);
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#endif /* __RVU_H__ */
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