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c8c5fc266e
Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
32 lines
850 B
C
32 lines
850 B
C
/*
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* Copyright 2004, 2007 Freescale Semiconductor.
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* Copyright(c) 2003 Motorola Inc.
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*/
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#ifndef __MPC85xx_H__
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#define __MPC85xx_H__
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#include <asm/fsl_lbc.h>
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/* define for common ppc_asm.tmpl */
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#define EXC_OFF_SYS_RESET 0x100 /* System reset */
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#define _START_OFFSET 0
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#if defined(CONFIG_E500)
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#include <e500.h>
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#endif
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/*
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* SCCR - System Clock Control Register, 9-8
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*/
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#define SCCR_CLPD 0x00000004 /* CPM Low Power Disable */
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#define SCCR_DFBRG_MSK 0x00000003 /* Division by BRGCLK Mask */
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#define SCCR_DFBRG_SHIFT 0
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#define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 4 */
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#define SCCR_DFBRG01 0x00000001 /* BRGCLK div by 16 (normal) */
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#define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */
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#define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */
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#endif /* __MPC85xx_H__ */
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