mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-15 15:46:16 +09:00
067716bac5
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
132 lines
3.5 KiB
C
132 lines
3.5 KiB
C
/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __BCM28155_AP_H
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#define __BCM28155_AP_H
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#include <linux/sizes.h>
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#include <asm/arch/sysmap.h>
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/* CPU, chip, mach, etc */
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#define CONFIG_KONA
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/*
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* Memory configuration
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*/
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#define CONFIG_SYS_TEXT_BASE 0xae000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_SIZE 0x80000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */
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#define CONFIG_STACKSIZE SZ_256K
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/* GPIO Driver */
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#define CONFIG_KONA_GPIO
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/* MMC/SD Driver */
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#define CONFIG_SDHCI
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#define CONFIG_MMC_SDMA
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#define CONFIG_KONA_SDHCI
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR
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#define CONFIG_SYS_SDIO0_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO1_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO2_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO3_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO0 "sdio1"
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#define CONFIG_SYS_SDIO1 "sdio2"
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#define CONFIG_SYS_SDIO2 "sdio3"
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#define CONFIG_SYS_SDIO3 "sdio4"
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/* I2C Driver */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_KONA
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#define CONFIG_SYS_SPD_BUS_NUM 3 /* Start with PMU bus */
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#define CONFIG_SYS_MAX_I2C_BUS 4
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#define CONFIG_SYS_I2C_BASE0 BSC1_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE1 BSC2_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE2 BSC3_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE3 PMU_BSC_BASE_ADDR
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/* Timer Driver */
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#define CONFIG_SYS_TIMER_RATE 32000
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#define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */
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/* Init functions */
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#define CONFIG_MISC_INIT_R /* board's misc_init_r function */
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/* Some commands use this as the default load address */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
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/* No mtest functions as recommended */
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/*
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* This is the initial SP which is used only briefly for relocating the u-boot
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* image to the top of SDRAM. After relocation u-boot moves the stack to the
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* proper place.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
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/* Serial Info */
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#define CONFIG_SYS_NS16550_SERIAL
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/* Post pad 3 bytes after each reg addr */
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK 13000000
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 0x3e000000
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#define CONFIG_BAUDRATE 115200
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/* must fit into GPT:u-boot-env partition */
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_OFFSET (0x00011a00 * 512)
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#define CONFIG_ENV_SIZE (8 * 512)
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#define CONFIG_SYS_NO_FLASH /* Not using NAND/NOR unmanaged flash */
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/* console configuration */
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#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16) /* Printbuffer size */
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* One partition type must be defined for part.c
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* This is necessary for the fatls command to work on an SD card
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* for example.
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*/
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#define CONFIG_DOS_PARTITION
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#define CONFIG_EFI_PARTITION
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/* version string, parser, etc */
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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/* Initial upstream - boot to cmd prompt only */
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#define CONFIG_BOOTCOMMAND ""
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/* Commands */
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#define CONFIG_FAT_WRITE
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#define CONFIG_USBID_ADDR 0x34052c46
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#endif /* __BCM28155_AP_H */
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