mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-15 15:46:16 +09:00
fa2f81b06f
On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary. Tested on OMAP4 Pandaboard, OMAP3 Beagle xM Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
123 lines
3.3 KiB
C
123 lines
3.3 KiB
C
/*
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* (C) Copyright 2014
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* Texas Instruments Incorporated.
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* Felipe Balbi <balbi@ti.com>
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*
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* Configuration settings for the TI Beagle x15 board.
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* See ti_omap5_common.h for omap5 common settings.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_AM57XX_EVM_H
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#define __CONFIG_AM57XX_EVM_H
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#define CONFIG_AM57XX
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_IODELAY_RECALIBRATION
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#endif
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_ENV_SIZE (64 << 10)
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#define CONFIG_ENV_IS_IN_FAT
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#define FAT_ENV_INTERFACE "mmc"
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#define FAT_ENV_DEVICE_AND_PART "0:1"
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#define FAT_ENV_FILE "uboot.env"
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#define CONSOLEDEV "ttyO2"
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#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
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#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
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#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_OMAP_ABE_SYSCK
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/* Define the default GPT table for eMMC */
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#define PARTS_DEFAULT \
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"uuid_disk=${uuid_gpt_disk};" \
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"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
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#include <configs/ti_omap5_common.h>
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/* Enhance our eMMC support / experience. */
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#define CONFIG_CMD_GPT
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#define CONFIG_EFI_PARTITION
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/* CPSW Ethernet */
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#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
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#define CONFIG_MII /* Required in net/eth.c */
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#define CONFIG_PHY_GIGE /* per-board part of CPSW */
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#define CONFIG_PHYLIB
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#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
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#define CONFIG_SUPPORT_EMMC_BOOT
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/* USB xHCI HOST */
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#define CONFIG_USB_XHCI_OMAP
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#define CONFIG_USB_STORAGE
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
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#define CONFIG_OMAP_USB_PHY
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#define CONFIG_OMAP_USB3PHY1_HOST
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/* SATA */
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_SCSI
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#define CONFIG_LIBATA
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#define CONFIG_SCSI_AHCI
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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/* EEPROM */
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#define CONFIG_EEPROM_CHIP_ADDRESS 0x50
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#define CONFIG_EEPROM_BUS_ADDRESS 0
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/*
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* Default to using SPI for environment, etc.
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* 0x000000 - 0x040000 : QSPI.SPL (256KiB)
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* 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
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* 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
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* 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
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* 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
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* 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
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* 0x9E0000 - 0x2000000 : USERLAND
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*/
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#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
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#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
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#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
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#ifdef CONFIG_SPL_BUILD
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#undef CONFIG_DM_SPI
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#undef CONFIG_DM_SPI_FLASH
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#endif
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/* SPI SPL */
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_DMA_SUPPORT
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#define CONFIG_TI_EDMA3
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
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/* SPI */
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#undef CONFIG_OMAP3_SPI
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#define CONFIG_TI_SPI_MMAP
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#define CONFIG_SF_DEFAULT_SPEED 76800000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_QSPI_QUAD_SUPPORT
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#endif /* __CONFIG_AM57XX_EVM_H */
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