mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
200 lines
5.7 KiB
C
200 lines
5.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* From coreboot soc/intel/broadwell/include/soc/me.h
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*
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* Copyright (C) 2014 Google Inc.
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*/
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#ifndef _asm_arch_me_h
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#define _asm_arch_me_h
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#include <asm/me_common.h>
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#define ME_INIT_STATUS_SUCCESS_OTHER 3 /* SEE ME9 BWG */
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#define ME_HSIO_MESSAGE (7 << 28)
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#define ME_HSIO_CMD_GETHSIOVER 1
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#define ME_HSIO_CMD_CLOSE 0
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/*
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* Apparently the GMES register is renamed to HFS2 (or HFSTS2 according
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* to ME9 BWG). Sadly the PCH EDS and the ME BWG do not match on nomenclature.
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*/
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#define PCI_ME_HFS2 0x48
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/* Infrastructure Progress Values */
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#define ME_HFS2_PHASE_ROM 0
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#define ME_HFS2_PHASE_BUP 1
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#define ME_HFS2_PHASE_UKERNEL 2
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#define ME_HFS2_PHASE_POLICY 3
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#define ME_HFS2_PHASE_MODULE_LOAD 4
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#define ME_HFS2_PHASE_UNKNOWN 5
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#define ME_HFS2_PHASE_HOST_COMM 6
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/* Current State - Based on Infra Progress values. */
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/* ROM State */
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#define ME_HFS2_STATE_ROM_BEGIN 0
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#define ME_HFS2_STATE_ROM_DISABLE 6
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/* BUP State */
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#define ME_HFS2_STATE_BUP_INIT 0
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#define ME_HFS2_STATE_BUP_DIS_HOST_WAKE 1
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#define ME_HFS2_STATE_BUP_FLOW_DET 4
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#define ME_HFS2_STATE_BUP_VSCC_ERR 8
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#define ME_HFS2_STATE_BUP_CHECK_STRAP 0xa
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#define ME_HFS2_STATE_BUP_PWR_OK_TIMEOUT 0xb
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#define ME_HFS2_STATE_BUP_MANUF_OVRD_STRAP 0xd
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#define ME_HFS2_STATE_BUP_M3 0x11
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#define ME_HFS2_STATE_BUP_M0 0x12
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#define ME_HFS2_STATE_BUP_FLOW_DET_ERR 0x13
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#define ME_HFS2_STATE_BUP_M3_CLK_ERR 0x15
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#define ME_HFS2_STATE_BUP_CPU_RESET_DID_TIMEOUT_MEM_MISSING 0x17
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#define ME_HFS2_STATE_BUP_M3_KERN_LOAD 0x18
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#define ME_HFS2_STATE_BUP_T32_MISSING 0x1c
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#define ME_HFS2_STATE_BUP_WAIT_DID 0x1f
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#define ME_HFS2_STATE_BUP_WAIT_DID_FAIL 0x20
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#define ME_HFS2_STATE_BUP_DID_NO_FAIL 0x21
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#define ME_HFS2_STATE_BUP_ENABLE_UMA 0x22
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#define ME_HFS2_STATE_BUP_ENABLE_UMA_ERR 0x23
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#define ME_HFS2_STATE_BUP_SEND_DID_ACK 0x24
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#define ME_HFS2_STATE_BUP_SEND_DID_ACK_ERR 0x25
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#define ME_HFS2_STATE_BUP_M0_CLK 0x26
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#define ME_HFS2_STATE_BUP_M0_CLK_ERR 0x27
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#define ME_HFS2_STATE_BUP_TEMP_DIS 0x28
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#define ME_HFS2_STATE_BUP_M0_KERN_LOAD 0x32
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/* Policy Module State */
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#define ME_HFS2_STATE_POLICY_ENTRY 0
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#define ME_HFS2_STATE_POLICY_RCVD_S3 3
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#define ME_HFS2_STATE_POLICY_RCVD_S4 4
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#define ME_HFS2_STATE_POLICY_RCVD_S5 5
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#define ME_HFS2_STATE_POLICY_RCVD_UPD 6
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#define ME_HFS2_STATE_POLICY_RCVD_PCR 7
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#define ME_HFS2_STATE_POLICY_RCVD_NPCR 8
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#define ME_HFS2_STATE_POLICY_RCVD_HOST_WAKE 9
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#define ME_HFS2_STATE_POLICY_RCVD_AC_DC 0xa
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#define ME_HFS2_STATE_POLICY_RCVD_DID 0xb
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#define ME_HFS2_STATE_POLICY_VSCC_NOT_FOUND 0xc
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#define ME_HFS2_STATE_POLICY_VSCC_INVALID 0xd
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#define ME_HFS2_STATE_POLICY_FPB_ERR 0xe
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#define ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR 0xf
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#define ME_HFS2_STATE_POLICY_VSCC_NO_MATCH 0x10
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/* Current PM Event Values */
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#define ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE 0
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#define ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR 1
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#define ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET 2
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#define ME_HFS2_PMEVENT_CLEAN_GLOBAL_RESET_ERROR 3
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#define ME_HFS2_PMEVENT_CLEAN_ME_RESET 4
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#define ME_HFS2_PMEVENT_ME_RESET_EXCEPTION 5
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#define ME_HFS2_PMEVENT_PSEUDO_ME_RESET 6
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#define ME_HFS2_PMEVENT_S0MO_SXM3 7
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#define ME_HFS2_PMEVENT_SXM3_S0M0 8
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#define ME_HFS2_PMEVENT_NON_PWR_CYCLE_RESET 9
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#define ME_HFS2_PMEVENT_PWR_CYCLE_RESET_M3 0xa
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#define ME_HFS2_PMEVENT_PWR_CYCLE_RESET_MOFF 0xb
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#define ME_HFS2_PMEVENT_SXMX_SXMOFF 0xc
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struct me_hfs2 {
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u32 bist_in_progress:1;
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u32 reserved1:2;
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u32 invoke_mebx:1;
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u32 cpu_replaced_sts:1;
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u32 mbp_rdy:1;
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u32 mfs_failure:1;
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u32 warm_reset_request:1;
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u32 cpu_replaced_valid:1;
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u32 reserved2:4;
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u32 mbp_cleared:1;
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u32 reserved3:2;
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u32 current_state:8;
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u32 current_pmevent:4;
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u32 progress_code:4;
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} __packed;
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#define PCI_ME_HFS5 0x68
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#define PCI_ME_H_GS2 0x70
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#define PCI_ME_MBP_GIVE_UP 0x01
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/* ICC Messages */
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#define ICC_SET_CLOCK_ENABLES 0x3
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#define ICC_API_VERSION_LYNXPOINT 0x00030000
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struct icc_header {
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u32 api_version;
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u32 icc_command;
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u32 icc_status;
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u32 length;
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u32 reserved;
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} __packed;
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struct icc_clock_enables_msg {
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u32 clock_enables;
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u32 clock_mask;
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u32 no_response:1;
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u32 reserved:31;
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} __packed;
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/*
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* ME to BIOS Payload Datastructures and definitions. The ordering of the
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* structures follows the ordering in the ME9 BWG.
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*/
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#define MBP_APPID_KERNEL 1
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#define MBP_APPID_INTEL_AT 3
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#define MBP_APPID_HWA 4
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#define MBP_APPID_ICC 5
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#define MBP_APPID_NFC 6
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/* Kernel items: */
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#define MBP_KERNEL_FW_VER_ITEM 1
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#define MBP_KERNEL_FW_CAP_ITEM 2
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#define MBP_KERNEL_ROM_BIST_ITEM 3
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#define MBP_KERNEL_PLAT_KEY_ITEM 4
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#define MBP_KERNEL_FW_TYPE_ITEM 5
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#define MBP_KERNEL_MFS_FAILURE_ITEM 6
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#define MBP_KERNEL_PLAT_TIME_ITEM 7
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/* Intel AT items: */
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#define MBP_INTEL_AT_STATE_ITEM 1
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/* ICC Items: */
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#define MBP_ICC_PROFILE_ITEM 1
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/* HWA Items: */
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#define MBP_HWA_REQUEST_ITEM 1
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/* NFC Items: */
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#define MBP_NFC_SUPPORT_DATA_ITEM 1
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#define MBP_MAKE_IDENT(appid, item) ((appid << 8) | item)
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#define MBP_IDENT(appid, item) \
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MBP_MAKE_IDENT(MBP_APPID_##appid, MBP_##appid##_##item##_ITEM)
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struct mbp_fw_version_name {
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u32 major_version:16;
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u32 minor_version:16;
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u32 hotfix_version:16;
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u32 build_version:16;
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} __packed;
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struct icc_address_mask {
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u16 icc_start_address;
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u16 mask;
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} __packed;
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struct mbp_icc_profile {
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u8 num_icc_profiles;
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u8 icc_profile_soft_strap;
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u8 icc_profile_index;
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u8 reserved;
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u32 icc_reg_bundles;
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struct icc_address_mask icc_address_mask[0];
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} __packed;
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struct me_bios_payload {
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struct mbp_fw_version_name *fw_version_name;
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struct mbp_mefwcaps *fw_capabilities;
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struct mbp_rom_bist_data *rom_bist_data;
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struct mbp_platform_key *platform_key;
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struct mbp_plat_type *fw_plat_type;
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struct mbp_icc_profile *icc_profile;
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struct mbp_at_state *at_state;
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u32 *mfsintegrity;
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struct mbp_plat_time *plat_time;
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struct mbp_nfc_data *nfc_data;
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};
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#endif
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