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https://github.com/brain-hackers/u-boot-brain
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![Stefano Babic](/assets/img/avatar_default.png)
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
229 lines
5.0 KiB
C
229 lines
5.0 KiB
C
/*
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* Copyright (C) 2014-2016, Toradex AG
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Helpers for Freescale PMIC PF0100
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include "pf0100_otp.inc"
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#include "pf0100.h"
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/* define for PMIC register dump */
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/*#define DEBUG */
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/* use Apalis GPIO1 to switch on VPGM, ON: 1 */
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static iomux_v3_cfg_t const pmic_prog_pads[] = {
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MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
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# define PMIC_PROG_VOLTAGE IMX_GPIO_NR(2, 4)
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};
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unsigned pmic_init(void)
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{
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unsigned programmed = 0;
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uchar bus = 1;
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uchar devid, revid, val;
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puts("PMIC: ");
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if (!((0 == i2c_set_bus_num(bus)) &&
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(0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
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puts("i2c bus failed\n");
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return 0;
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}
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/* get device ident */
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) {
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puts("i2c pmic devid read failed\n");
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return 0;
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}
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) {
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puts("i2c pmic revid read failed\n");
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return 0;
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}
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printf("device id: 0x%.2x, revision id: 0x%.2x\n", devid, revid);
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#ifdef DEBUG
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{
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unsigned i, j;
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for (i = 0; i < 16; i++)
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printf("\t%x", i);
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for (j = 0; j < 0x80; ) {
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printf("\n%2x", j);
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for (i = 0; i < 16; i++) {
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i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
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printf("\t%2x", val);
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}
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j += 0x10;
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}
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printf("\nEXT Page 1");
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val = PFUZE100_PAGE_REGISTER_PAGE1;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
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&val, 1)) {
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puts("i2c write failed\n");
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return 0;
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}
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for (j = 0x80; j < 0x100; ) {
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printf("\n%2x", j);
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for (i = 0; i < 16; i++) {
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i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
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printf("\t%2x", val);
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}
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j += 0x10;
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}
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printf("\nEXT Page 2");
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val = PFUZE100_PAGE_REGISTER_PAGE2;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
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&val, 1)) {
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puts("i2c write failed\n");
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return 0;
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}
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for (j = 0x80; j < 0x100; ) {
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printf("\n%2x", j);
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for (i = 0; i < 16; i++) {
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i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
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printf("\t%2x", val);
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}
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j += 0x10;
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}
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printf("\n");
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}
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#endif
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/* get device programmed state */
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val = PFUZE100_PAGE_REGISTER_PAGE1;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) {
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puts("i2c write failed\n");
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return 0;
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}
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) {
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puts("i2c fuse_por read failed\n");
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return 0;
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}
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if (val & PFUZE100_FUSE_POR_M)
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programmed++;
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) {
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puts("i2c fuse_por read failed\n");
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return programmed;
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}
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if (val & PFUZE100_FUSE_POR_M)
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programmed++;
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) {
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puts("i2c fuse_por read failed\n");
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return programmed;
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}
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if (val & PFUZE100_FUSE_POR_M)
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programmed++;
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switch (programmed) {
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case 0:
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printf("PMIC: not programmed\n");
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break;
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case 3:
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printf("PMIC: programmed\n");
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break;
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default:
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printf("PMIC: undefined programming state\n");
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break;
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}
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/* The following is needed during production */
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if (programmed != 3) {
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/* set VGEN1 to 1.2V */
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val = PFUZE100_VGEN1_VAL;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_VGEN1CTL, 1,
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&val, 1)) {
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puts("i2c write failed\n");
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return programmed;
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}
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/* set SWBST to 5.0V */
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val = PFUZE100_SWBST_VAL;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_SWBSTCTL, 1,
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&val, 1)) {
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puts("i2c write failed\n");
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}
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}
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return programmed;
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}
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int pf0100_prog(void)
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{
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unsigned char bus = 1;
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unsigned char val;
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unsigned int i;
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if (pmic_init() == 3) {
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puts("PMIC already programmed, exiting\n");
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return CMD_RET_FAILURE;
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}
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/* set up gpio to manipulate vprog, initially off */
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imx_iomux_v3_setup_multiple_pads(pmic_prog_pads,
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ARRAY_SIZE(pmic_prog_pads));
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gpio_direction_output(PMIC_PROG_VOLTAGE, 0);
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if (!((0 == i2c_set_bus_num(bus)) &&
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(0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
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puts("i2c bus failed\n");
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return CMD_RET_FAILURE;
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}
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for (i = 0; i < ARRAY_SIZE(pmic_otp_prog); i++) {
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switch (pmic_otp_prog[i].cmd) {
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case pmic_i2c:
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val = (unsigned char) (pmic_otp_prog[i].value & 0xff);
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if (i2c_write(PFUZE100_I2C_ADDR, pmic_otp_prog[i].reg,
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1, &val, 1)) {
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printf("i2c write failed, reg 0x%2x, value 0x%2x\n",
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pmic_otp_prog[i].reg, val);
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return CMD_RET_FAILURE;
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}
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break;
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case pmic_delay:
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udelay(pmic_otp_prog[i].value * 1000);
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break;
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case pmic_vpgm:
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gpio_direction_output(PMIC_PROG_VOLTAGE,
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pmic_otp_prog[i].value);
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break;
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case pmic_pwr:
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/* TODO */
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break;
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}
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}
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return CMD_RET_SUCCESS;
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}
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int do_pf0100_prog(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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int ret;
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puts("Programming PMIC OTP...");
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ret = pf0100_prog();
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if (ret == CMD_RET_SUCCESS)
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puts("done.\n");
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else
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puts("failed.\n");
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return ret;
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}
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U_BOOT_CMD(
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pf0100_otp_prog, 1, 0, do_pf0100_prog,
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"Program the OTP fuses on the PMIC PF0100",
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""
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);
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