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448437496b
u-boot-brain/arch/arm/cpu/armv7/uniphier/ph1-pro4
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Masahiro Yamada 448437496b ARM: UniPhier: fix IECTRL set code for PH1-Pro4 
For PH1-Pro4, the bit 6 of the IECTRL must be set.  It is the only
available bit in this register.  There is no effect of the write
access to the other bits.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-23 00:50:57 +09:00
..
board_info.c ARM: UniPhier: add UniPhier SoC support code 2014-10-05 14:10:09 +09:00
boot-mode.c ARM: UniPhier: add UniPhier SoC support code 2014-10-05 14:10:09 +09:00
clkrst_init.c ARM: UniPhier: add UniPhier SoC support code 2014-10-05 14:10:09 +09:00
ddrphy_init.c ARM: UniPhier: add DDR PHY training code 2014-12-30 17:45:25 +09:00
lowlevel_debug.S ARM: UniPhier: add UART initialization routine for low-level debug 2015-01-08 23:01:56 +09:00
Makefile ARM: UniPhier: add UART initialization routine for low-level debug 2015-01-08 23:01:56 +09:00
pinctrl.c ARM: UniPhier: add EHCI host pin settings for PH1-Pro4 2014-11-12 00:17:13 +09:00
platdevice.c usb: UniPhier: support OF configuration 2014-11-28 02:21:01 +09:00
pll_init.c ARM: UniPhier: add UniPhier SoC support code 2014-10-05 14:10:09 +09:00
pll_spectrum.c ARM: UniPhier: add UniPhier SoC support code 2014-10-05 14:10:09 +09:00
sbc_init.c ARM: UniPhier: use boot_is_swapped() macro for readability 2014-12-08 01:25:44 +09:00
sg_init.c ARM: UniPhier: fix IECTRL set code for PH1-Pro4 2015-01-23 00:50:57 +09:00
umc_init.c ARM: UniPhier: add DDR PHY training code 2014-12-30 17:45:25 +09:00