mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
44726096cf
It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration settings for the Allwinner A64 (sun50i) CPU
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*/
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#if defined(CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER) && !defined(CONFIG_SPL_BUILD)
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/* reserve space for BOOT0 header information */
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b reset
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.space 1532
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#elif defined(CONFIG_ARM_BOOT_HOOK_RMR)
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/*
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* Switch into AArch64 if needed.
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* Refer to arch/arm/mach-sunxi/rmr_switch.S for the original source.
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*/
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tst x0, x0 // this is "b #0x84" in ARM
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b reset
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.space 0x7c
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.word 0xe28f0058 // add r0, pc, #88
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.word 0xe59f1054 // ldr r1, [pc, #84]
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.word 0xe0800001 // add r0, r0, r1
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.word 0xe580d000 // str sp, [r0]
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.word 0xe580e004 // str lr, [r0, #4]
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.word 0xe10fe000 // mrs lr, CPSR
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.word 0xe580e008 // str lr, [r0, #8]
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.word 0xee11ef10 // mrc 15, 0, lr, cr1, cr0, {0}
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.word 0xe580e00c // str lr, [r0, #12]
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.word 0xee1cef10 // mrc 15, 0, lr, cr12, cr0, {0}
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.word 0xe580e010 // str lr, [r0, #16]
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.word 0xe59f1024 // ldr r1, [pc, #36] ; 0x170000a0
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.word 0xe59f0024 // ldr r0, [pc, #36] ; CONFIG_*_TEXT_BASE
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.word 0xe5810000 // str r0, [r1]
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.word 0xf57ff04f // dsb sy
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.word 0xf57ff06f // isb sy
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.word 0xee1c0f50 // mrc 15, 0, r0, cr12, cr0, {2} ; RMR
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.word 0xe3800003 // orr r0, r0, #3
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.word 0xee0c0f50 // mcr 15, 0, r0, cr12, cr0, {2} ; RMR
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.word 0xf57ff06f // isb sy
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.word 0xe320f003 // wfi
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.word 0xeafffffd // b @wfi
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#ifndef CONFIG_SUN50I_GEN_H6
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.word 0x017000a0 // writeable RVBAR mapping address
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#else
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.word 0x09010040 // writeable RVBAR mapping address
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#endif
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#ifdef CONFIG_SPL_BUILD
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.word CONFIG_SPL_TEXT_BASE
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#else
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.word CONFIG_SYS_TEXT_BASE
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#endif
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.word fel_stash - .
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#else
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/* normal execution */
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b reset
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#endif
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