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https://github.com/brain-hackers/u-boot-brain
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939911a64b
The omap_hw_init_context function (and assorted helpers) is the same for all OMAP-derived parts as when CHSETTINGS are used, that's the same and our DDR base is also always the same. In order to make this common we simply need to update the names of the define for DDR address space which is also common. Cc: Sricharan R. <r.sricharan@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
48 lines
1.1 KiB
C
48 lines
1.1 KiB
C
/*
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* sys_proto.h
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*
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* System information header
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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#include <linux/mtd/omap_gpmc.h>
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#include <asm/ti-common/sys_proto.h>
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#include <asm/arch/cpu.h>
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#define BOARD_REV_ID 0x0
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u32 get_cpu_rev(void);
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u32 get_sysboot_value(void);
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extern struct ctrl_stat *cstat;
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u32 get_device_type(void);
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void save_omap_boot_params(void);
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void setup_clocks_for_console(void);
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void mpu_pll_config_val(int mpull_m);
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void ddr_pll_config(unsigned int ddrpll_M);
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void sdelay(unsigned long);
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struct gpmc_cs;
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void gpmc_init(void);
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void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
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u32 size);
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void omap_nand_switch_ecc(uint32_t, uint32_t);
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void set_uart_mux_conf(void);
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void set_mux_conf_regs(void);
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void sdram_init(void);
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u32 wait_on_value(u32, u32, void *, u32);
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#ifdef CONFIG_NOR_BOOT
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void enable_norboot_pin_mux(void);
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#endif
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void am33xx_spl_board_init(void);
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int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev);
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int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency);
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#endif
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