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![T Karthik Reddy](/assets/img/avatar_default.png)
This patch checks for zynq aes & rsa commands max parameters count. Also checks minimum number of parameters count for aes command. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
523 lines
12 KiB
C
523 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Xilinx, Inc.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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#include <malloc.h>
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#include <u-boot/md5.h>
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#include <u-boot/rsa.h>
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#include <u-boot/rsa-mod-exp.h>
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#include <u-boot/sha256.h>
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#include <zynqpl.h>
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#include <fpga.h>
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#include <zynq_bootimg.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_CMD_ZYNQ_RSA
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#define ZYNQ_EFUSE_RSA_ENABLE_MASK 0x400
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#define ZYNQ_ATTRIBUTE_PL_IMAGE_MASK 0x20
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#define ZYNQ_ATTRIBUTE_CHECKSUM_TYPE_MASK 0x7000
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#define ZYNQ_ATTRIBUTE_RSA_PRESENT_MASK 0x8000
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#define ZYNQ_ATTRIBUTE_RSA_PART_OWNER_MASK 0x30000
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#define ZYNQ_RSA_MODULAR_SIZE 256
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#define ZYNQ_RSA_MODULAR_EXT_SIZE 256
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#define ZYNQ_RSA_EXPO_SIZE 64
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#define ZYNQ_RSA_SPK_SIGNATURE_SIZE 256
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#define ZYNQ_RSA_PARTITION_SIGNATURE_SIZE 256
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#define ZYNQ_RSA_SIGNATURE_SIZE 0x6C0
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#define ZYNQ_RSA_HEADER_SIZE 4
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#define ZYNQ_RSA_MAGIC_WORD_SIZE 60
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#define ZYNQ_RSA_PART_OWNER_UBOOT 1
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#define ZYNQ_RSA_ALIGN_PPK_START 64
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#define WORD_LENGTH_SHIFT 2
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static u8 *ppkmodular;
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static u8 *ppkmodularex;
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struct zynq_rsa_public_key {
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uint len; /* Length of modulus[] in number of u32 */
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u32 n0inv; /* -1 / modulus[0] mod 2^32 */
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u32 *modulus; /* modulus as little endian array */
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u32 *rr; /* R^2 as little endian array */
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};
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static struct zynq_rsa_public_key public_key;
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static struct partition_hdr part_hdr[ZYNQ_MAX_PARTITION_NUMBER];
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/*
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* Extract the primary public key components from already autheticated FSBL
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*/
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static void zynq_extract_ppk(u32 fsbl_len)
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{
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u32 padsize;
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u8 *ppkptr;
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debug("%s\n", __func__);
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/*
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* Extract the authenticated PPK from OCM i.e at end of the FSBL
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*/
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ppkptr = (u8 *)(fsbl_len + ZYNQ_OCM_BASEADDR);
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padsize = ((u32)ppkptr % ZYNQ_RSA_ALIGN_PPK_START);
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if (padsize)
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ppkptr += (ZYNQ_RSA_ALIGN_PPK_START - padsize);
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ppkptr += ZYNQ_RSA_HEADER_SIZE;
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ppkptr += ZYNQ_RSA_MAGIC_WORD_SIZE;
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ppkmodular = (u8 *)ppkptr;
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ppkptr += ZYNQ_RSA_MODULAR_SIZE;
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ppkmodularex = (u8 *)ppkptr;
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ppkptr += ZYNQ_RSA_MODULAR_EXT_SIZE;
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}
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/*
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* Calculate the inverse(-1 / modulus[0] mod 2^32 ) for the PPK
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*/
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static u32 zynq_calc_inv(void)
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{
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u32 modulus = public_key.modulus[0];
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u32 tmp = BIT(1);
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u32 inverse;
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inverse = modulus & BIT(0);
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while (tmp) {
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inverse *= 2 - modulus * inverse;
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tmp *= tmp;
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}
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return ~(inverse - 1);
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}
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/*
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* Recreate the signature by padding the bytes and verify with hash value
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*/
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static int zynq_pad_and_check(u8 *signature, u8 *hash)
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{
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u8 padding[] = {0x30, 0x31, 0x30, 0x0D, 0x06, 0x09, 0x60, 0x86, 0x48,
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0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04,
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0x20};
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u8 *pad_ptr = signature + 256;
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u32 pad = 202;
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u32 ii;
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/*
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* Re-Create PKCS#1v1.5 Padding
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* MSB ----------------------------------------------------LSB
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* 0x0 || 0x1 || 0xFF(for 202 bytes) || 0x0 || T_padding || SHA256 Hash
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*/
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if (*--pad_ptr != 0 || *--pad_ptr != 1)
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return -1;
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for (ii = 0; ii < pad; ii++) {
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if (*--pad_ptr != 0xFF)
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return -1;
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}
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if (*--pad_ptr != 0)
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return -1;
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for (ii = 0; ii < sizeof(padding); ii++) {
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if (*--pad_ptr != padding[ii])
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return -1;
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}
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for (ii = 0; ii < 32; ii++) {
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if (*--pad_ptr != hash[ii])
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return -1;
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}
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return 0;
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}
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/*
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* Verify and extract the hash value from signature using the public key
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* and compare it with calculated hash value.
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*/
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static int zynq_rsa_verify_key(const struct zynq_rsa_public_key *key,
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const u8 *sig, const u32 sig_len, const u8 *hash)
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{
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int status;
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void *buf;
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if (!key || !sig || !hash)
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return -1;
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if (sig_len != (key->len * sizeof(u32))) {
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printf("Signature is of incorrect length %d\n", sig_len);
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return -1;
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}
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/* Sanity check for stack size */
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if (sig_len > ZYNQ_RSA_SPK_SIGNATURE_SIZE) {
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printf("Signature length %u exceeds maximum %d\n", sig_len,
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ZYNQ_RSA_SPK_SIGNATURE_SIZE);
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return -1;
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}
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buf = malloc(sig_len);
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if (!buf)
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return -1;
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memcpy(buf, sig, sig_len);
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status = zynq_pow_mod((u32 *)key, (u32 *)buf);
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if (status == -1) {
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free(buf);
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return status;
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}
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status = zynq_pad_and_check((u8 *)buf, (u8 *)hash);
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free(buf);
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return status;
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}
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/*
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* Authenticate the partition
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*/
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static int zynq_authenticate_part(u8 *buffer, u32 size)
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{
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u8 hash_signature[32];
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u8 *spk_modular;
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u8 *spk_modular_ex;
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u8 *signature_ptr;
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u32 status;
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debug("%s\n", __func__);
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signature_ptr = (u8 *)(buffer + size - ZYNQ_RSA_SIGNATURE_SIZE);
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signature_ptr += ZYNQ_RSA_HEADER_SIZE;
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signature_ptr += ZYNQ_RSA_MAGIC_WORD_SIZE;
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ppkmodular = (u8 *)signature_ptr;
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signature_ptr += ZYNQ_RSA_MODULAR_SIZE;
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ppkmodularex = signature_ptr;
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signature_ptr += ZYNQ_RSA_MODULAR_EXT_SIZE;
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signature_ptr += ZYNQ_RSA_EXPO_SIZE;
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sha256_csum_wd((const unsigned char *)signature_ptr,
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(ZYNQ_RSA_MODULAR_EXT_SIZE + ZYNQ_RSA_EXPO_SIZE +
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ZYNQ_RSA_MODULAR_SIZE),
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(unsigned char *)hash_signature, 0x1000);
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spk_modular = (u8 *)signature_ptr;
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signature_ptr += ZYNQ_RSA_MODULAR_SIZE;
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spk_modular_ex = (u8 *)signature_ptr;
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signature_ptr += ZYNQ_RSA_MODULAR_EXT_SIZE;
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signature_ptr += ZYNQ_RSA_EXPO_SIZE;
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public_key.len = ZYNQ_RSA_MODULAR_SIZE / sizeof(u32);
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public_key.modulus = (u32 *)ppkmodular;
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public_key.rr = (u32 *)ppkmodularex;
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public_key.n0inv = zynq_calc_inv();
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status = zynq_rsa_verify_key(&public_key, signature_ptr,
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ZYNQ_RSA_SPK_SIGNATURE_SIZE,
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hash_signature);
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if (status)
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return status;
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signature_ptr += ZYNQ_RSA_SPK_SIGNATURE_SIZE;
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sha256_csum_wd((const unsigned char *)buffer,
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(size - ZYNQ_RSA_PARTITION_SIGNATURE_SIZE),
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(unsigned char *)hash_signature, 0x1000);
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public_key.len = ZYNQ_RSA_MODULAR_SIZE / sizeof(u32);
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public_key.modulus = (u32 *)spk_modular;
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public_key.rr = (u32 *)spk_modular_ex;
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public_key.n0inv = zynq_calc_inv();
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return zynq_rsa_verify_key(&public_key, (u8 *)signature_ptr,
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ZYNQ_RSA_PARTITION_SIGNATURE_SIZE,
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(u8 *)hash_signature);
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}
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/*
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* Parses the partition header and verfies the authenticated and
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* encrypted image.
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*/
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static int zynq_verify_image(u32 src_ptr)
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{
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u32 silicon_ver, image_base_addr, status;
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u32 partition_num = 0;
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u32 efuseval, srcaddr, size, fsbl_len;
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struct partition_hdr *hdr_ptr;
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u32 part_data_len, part_img_len, part_attr;
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u32 part_load_addr, part_dst_addr, part_chksum_offset;
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u32 part_start_addr, part_total_size, partitioncount;
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bool encrypt_part_flag = false;
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bool part_chksum_flag = false;
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bool signed_part_flag = false;
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image_base_addr = src_ptr;
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silicon_ver = zynq_get_silicon_version();
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/* RSA not supported in silicon versions 1.0 and 2.0 */
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if (silicon_ver == 0 || silicon_ver == 1)
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return -1;
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zynq_get_partition_info(image_base_addr, &fsbl_len,
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&part_hdr[0]);
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/* Extract ppk if efuse was blown Otherwise return error */
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efuseval = readl(&efuse_base->status);
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if (!(efuseval & ZYNQ_EFUSE_RSA_ENABLE_MASK))
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return -1;
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zynq_extract_ppk(fsbl_len);
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partitioncount = zynq_get_part_count(&part_hdr[0]);
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/*
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* As the first two partitions are related to fsbl,
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* we can ignore those two in bootimage and the below
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* code doesn't need to validate it as fsbl is already
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* done by now
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*/
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if (partitioncount <= 2 ||
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partitioncount > ZYNQ_MAX_PARTITION_NUMBER)
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return -1;
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while (partition_num < partitioncount) {
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if (((part_hdr[partition_num].partitionattr &
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ZYNQ_ATTRIBUTE_RSA_PART_OWNER_MASK) >> 16) !=
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ZYNQ_RSA_PART_OWNER_UBOOT) {
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printf("UBOOT is not Owner for partition %d\n",
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partition_num);
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partition_num++;
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continue;
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}
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hdr_ptr = &part_hdr[partition_num];
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status = zynq_validate_hdr(hdr_ptr);
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if (status)
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return status;
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part_data_len = hdr_ptr->datawordlen;
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part_img_len = hdr_ptr->imagewordlen;
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part_attr = hdr_ptr->partitionattr;
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part_load_addr = hdr_ptr->loadaddr;
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part_chksum_offset = hdr_ptr->checksumoffset;
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part_start_addr = hdr_ptr->partitionstart;
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part_total_size = hdr_ptr->partitionwordlen;
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if (part_data_len != part_img_len) {
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debug("Encrypted\n");
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encrypt_part_flag = true;
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}
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if (part_attr & ZYNQ_ATTRIBUTE_CHECKSUM_TYPE_MASK)
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part_chksum_flag = true;
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if (part_attr & ZYNQ_ATTRIBUTE_RSA_PRESENT_MASK) {
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debug("RSA Signed\n");
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signed_part_flag = true;
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size = part_total_size << WORD_LENGTH_SHIFT;
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} else {
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size = part_img_len;
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}
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if (!signed_part_flag && !part_chksum_flag) {
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printf("Partition not signed & no chksum\n");
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partition_num++;
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continue;
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}
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srcaddr = image_base_addr +
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(part_start_addr << WORD_LENGTH_SHIFT);
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/*
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* This validation is just for PS DDR.
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* TODO: Update this for PL DDR check as well.
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*/
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if (part_load_addr < gd->bd->bi_dram[0].start &&
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((part_load_addr + part_data_len) >
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(gd->bd->bi_dram[0].start +
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gd->bd->bi_dram[0].size))) {
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printf("INVALID_LOAD_ADDRESS_FAIL\n");
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return -1;
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}
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if (part_attr & ZYNQ_ATTRIBUTE_PL_IMAGE_MASK)
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part_load_addr = srcaddr;
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else
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memcpy((u32 *)part_load_addr, (u32 *)srcaddr,
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size);
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if (part_chksum_flag) {
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part_chksum_offset = image_base_addr +
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(part_chksum_offset <<
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WORD_LENGTH_SHIFT);
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status = zynq_validate_partition(part_load_addr,
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(part_total_size <<
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WORD_LENGTH_SHIFT),
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part_chksum_offset);
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if (status != 0) {
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printf("PART_CHKSUM_FAIL\n");
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return -1;
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}
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debug("Partition Validation Done\n");
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}
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if (signed_part_flag) {
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status = zynq_authenticate_part((u8 *)part_load_addr,
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size);
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if (status != 0) {
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printf("AUTHENTICATION_FAIL\n");
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return -1;
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}
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debug("Authentication Done\n");
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}
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if (encrypt_part_flag) {
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debug("DECRYPTION\n");
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part_dst_addr = part_load_addr;
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if (part_attr & ZYNQ_ATTRIBUTE_PL_IMAGE_MASK) {
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partition_num++;
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continue;
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}
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status = zynq_decrypt_load(part_load_addr,
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part_img_len,
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part_dst_addr,
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part_data_len);
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if (status != 0) {
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printf("DECRYPTION_FAIL\n");
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return -1;
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}
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}
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partition_num++;
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}
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return 0;
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}
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static int do_zynq_rsa(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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u32 src_ptr;
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char *endp;
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if (argc != cmdtp->maxargs)
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return CMD_RET_FAILURE;
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src_ptr = simple_strtoul(argv[2], &endp, 16);
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if (*argv[2] == 0 || *endp != 0)
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return CMD_RET_USAGE;
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if (zynq_verify_image(src_ptr))
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return CMD_RET_FAILURE;
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return CMD_RET_SUCCESS;
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}
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#endif
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#ifdef CONFIG_CMD_ZYNQ_AES
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static int zynq_decrypt_image(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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char *endp;
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u32 srcaddr, srclen, dstaddr, dstlen;
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int status;
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if (argc < 5 && argc > cmdtp->maxargs)
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return CMD_RET_USAGE;
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srcaddr = simple_strtoul(argv[2], &endp, 16);
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if (*argv[2] == 0 || *endp != 0)
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return CMD_RET_USAGE;
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srclen = simple_strtoul(argv[3], &endp, 16);
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if (*argv[3] == 0 || *endp != 0)
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return CMD_RET_USAGE;
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dstaddr = simple_strtoul(argv[4], &endp, 16);
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if (*argv[4] == 0 || *endp != 0)
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return CMD_RET_USAGE;
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dstlen = simple_strtoul(argv[5], &endp, 16);
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if (*argv[5] == 0 || *endp != 0)
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return CMD_RET_USAGE;
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/*
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* Roundup source and destination lengths to
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* word size
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*/
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if (srclen % 4)
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srclen = roundup(srclen, 4);
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if (dstlen % 4)
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dstlen = roundup(dstlen, 4);
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status = zynq_decrypt_load(srcaddr, srclen >> 2, dstaddr, dstlen >> 2);
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if (status != 0)
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return CMD_RET_FAILURE;
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return CMD_RET_SUCCESS;
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}
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#endif
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static cmd_tbl_t zynq_commands[] = {
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#ifdef CONFIG_CMD_ZYNQ_RSA
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U_BOOT_CMD_MKENT(rsa, 3, 1, do_zynq_rsa, "", ""),
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#endif
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#ifdef CONFIG_CMD_ZYNQ_AES
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U_BOOT_CMD_MKENT(aes, 6, 1, zynq_decrypt_image, "", ""),
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#endif
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};
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static int do_zynq(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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cmd_tbl_t *zynq_cmd;
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int ret;
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if (!ARRAY_SIZE(zynq_commands)) {
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puts("No zynq specific command enabled\n");
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return CMD_RET_USAGE;
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}
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if (argc < 2)
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return CMD_RET_USAGE;
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zynq_cmd = find_cmd_tbl(argv[1], zynq_commands,
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ARRAY_SIZE(zynq_commands));
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if (!zynq_cmd)
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return CMD_RET_USAGE;
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ret = zynq_cmd->cmd(zynq_cmd, flag, argc, argv);
|
|
|
|
return cmd_process_error(zynq_cmd, ret);
|
|
}
|
|
|
|
#ifdef CONFIG_SYS_LONGHELP
|
|
static char zynq_help_text[] =
|
|
""
|
|
#ifdef CONFIG_CMD_ZYNQ_RSA
|
|
"rsa <baseaddr> - Verifies the authenticated and encrypted\n"
|
|
" zynq images and loads them back to load\n"
|
|
" addresses as specified in BOOT image(BOOT.BIN)\n"
|
|
#endif
|
|
#ifdef CONFIG_CMD_ZYNQ_AES
|
|
"aes <srcaddr> <srclen> <dstaddr> <dstlen>\n"
|
|
" - Decrypts the encrypted image present in source\n"
|
|
" address and places the decrypted image at\n"
|
|
" destination address\n"
|
|
#endif
|
|
;
|
|
#endif
|
|
|
|
U_BOOT_CMD(zynq, 6, 0, do_zynq,
|
|
"Zynq specific commands", zynq_help_text
|
|
);
|