mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-14 08:43:22 +09:00
e2572b5544
For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
96 lines
2.2 KiB
C
96 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2014 - 2019 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*/
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#include <common.h>
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#include <env.h>
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#include <log.h>
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#include <asm/sections.h>
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#include <dm/uclass.h>
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#include <i2c.h>
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#include <linux/sizes.h>
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#include "board.h"
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#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
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int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
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{
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int ret = -EINVAL;
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struct udevice *dev;
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ofnode eeprom;
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eeprom = ofnode_get_chosen_node("xlnx,eeprom");
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if (!ofnode_valid(eeprom))
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return -ENODEV;
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debug("%s: Path to EEPROM %s\n", __func__,
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ofnode_read_chosen_string("xlnx,eeprom"));
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ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
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if (ret)
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return ret;
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ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6);
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if (ret)
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debug("%s: I2C EEPROM MAC address read failed\n", __func__);
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else
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debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr);
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return ret;
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}
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#endif
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#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
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void *board_fdt_blob_setup(void)
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{
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void *fdt_blob;
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#if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
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fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
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if (fdt_magic(fdt_blob) == FDT_MAGIC)
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return fdt_blob;
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debug("DTB is not passed via %p\n", fdt_blob);
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#endif
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#ifdef CONFIG_SPL_BUILD
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/* FDT is at end of BSS unless it is in a different memory region */
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if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
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fdt_blob = (ulong *)&_image_binary_end;
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else
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fdt_blob = (ulong *)&__bss_end;
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#else
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/* FDT is at end of image */
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fdt_blob = (ulong *)&_end;
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#endif
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if (fdt_magic(fdt_blob) == FDT_MAGIC)
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return fdt_blob;
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debug("DTB is also not passed via %p\n", fdt_blob);
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return NULL;
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}
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#endif
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int board_late_init_xilinx(void)
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{
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u32 ret = 0;
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phys_size_t bootm_size = gd->ram_size;
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if (CONFIG_IS_ENABLED(ARCH_ZYNQ))
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bootm_size = min(bootm_size, (phys_size_t)(SZ_512M + SZ_256M));
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ret |= env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
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ret |= env_set_addr("bootm_low", (void *)gd->ram_base);
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ret |= env_set_addr("bootm_size", (void *)bootm_size);
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if (ret)
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printf("%s: Saving run time variables FAILED\n", __func__);
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return 0;
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}
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