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![Jagan Teki](/assets/img/avatar_default.png)
Due to board limitation some SSD's would work on rock960 PCIe M.2 only with 1.8V IO domain. So, this patch enables grf io_sel explicitly to make PCIe/M.2 to work. Cc: Tom Cubie <tom@radxa.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
29 lines
639 B
C
29 lines
639 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*/
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#include <common.h>
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#include <syscon.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/grf_rk3399.h>
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#include <asm/arch-rockchip/hardware.h>
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#include <linux/bitops.h>
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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struct rk3399_grf_regs *grf =
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syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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/**
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* Some SSD's to work on rock960 would require explicit
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* domain voltage change, so BT565 is in 1.8v domain
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*/
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rk_setreg(&grf->io_vsel, BIT(0));
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return 0;
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}
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#endif
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