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https://github.com/brain-hackers/u-boot-brain
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435acd83b2
Config Security Level Register is different between different SoCs, so put the CSL register definition into the arch specific directory. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
37 lines
702 B
C
37 lines
702 B
C
/*
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* Copyright 2014 Freescale Semiconductor
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <fsl_csu.h>
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#include <asm/arch/ns_access.h>
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static void enable_devices_ns_access(struct csu_ns_dev *ns_dev, uint32_t num)
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{
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u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR;
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u32 *reg;
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uint32_t val;
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int i;
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for (i = 0; i < num; i++) {
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reg = base + ns_dev[i].ind / 2;
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val = in_be32(reg);
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if (ns_dev[i].ind % 2 == 0) {
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val &= 0x0000ffff;
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val |= ns_dev[i].val << 16;
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} else {
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val &= 0xffff0000;
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val |= ns_dev[i].val;
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}
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out_be32(reg, val);
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}
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}
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void enable_layerscape_ns_access(void)
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{
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enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
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}
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