mirror of
https://github.com/brain-hackers/u-boot-brain
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5b8e76c35e
There was for long time no activity in the 8xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 8xx, so remove it (with a heavy heart, knowing that I remove here the root of U-Boot). Signed-off-by: Heiko Schocher <hs@denx.de>
90 lines
2.6 KiB
C
90 lines
2.6 KiB
C
/*
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* (C) Copyright 2007
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* Gary Jennejohn, DENX Software Engineering, garyj@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* sil680.c - ide support functions for the Sil0680A controller */
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/*
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* The following parameters must be defined in the configuration file
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* of the target board:
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*
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* #define CONFIG_IDE_SIL680
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*
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* #define CONFIG_PCI_PNP
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* NOTE it may also be necessary to define this if the default of 8 is
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* incorrect for the target board (e.g. the sequoia board requires 0).
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* #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0
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*
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* #define CONFIG_IDE
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* #undef CONFIG_IDE_LED
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* #undef CONFIG_IDE_RESET
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* #define CONFIG_IDE_PREINIT
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* #define CONFIG_SYS_IDE_MAXBUS 2 - modify to suit
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* #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) - modify to suit
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* #define CONFIG_SYS_ATA_BASE_ADDR 0
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* #define CONFIG_SYS_ATA_IDE0_OFFSET 0
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* #define CONFIG_SYS_ATA_IDE1_OFFSET 0
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* #define CONFIG_SYS_ATA_DATA_OFFSET 0
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* #define CONFIG_SYS_ATA_REG_OFFSET 0
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* #define CONFIG_SYS_ATA_ALT_OFFSET 0x0004
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*
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* The mapping for PCI IO-space.
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* NOTE this is the value for the sequoia board. Modify to suit.
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* #define CONFIG_SYS_PCI0_IO_SPACE 0xE8000000
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*/
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#include <common.h>
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#include <ata.h>
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#include <ide.h>
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#include <pci.h>
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extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS];
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int ide_preinit (void)
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{
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int status;
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pci_dev_t devbusfn;
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int l;
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status = 1;
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for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
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ide_bus_offset[l] = -ATA_STATUS;
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}
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devbusfn = pci_find_device (0x1095, 0x0680, 0);
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if (devbusfn != -1) {
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status = 0;
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
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(u32 *) &ide_bus_offset[0]);
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ide_bus_offset[0] &= 0xfffffff8;
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ide_bus_offset[0] += CONFIG_SYS_PCI0_IO_SPACE;
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
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(u32 *) &ide_bus_offset[1]);
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ide_bus_offset[1] &= 0xfffffff8;
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ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE;
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/* init various things - taken from the Linux driver */
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/* set PIO mode */
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pci_write_config_byte(devbusfn, 0x80, 0x00);
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pci_write_config_byte(devbusfn, 0x84, 0x00);
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/* IDE0 */
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pci_write_config_byte(devbusfn, 0xA1, 0x02);
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pci_write_config_word(devbusfn, 0xA2, 0x328A);
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pci_write_config_dword(devbusfn, 0xA4, 0x62DD62DD);
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pci_write_config_dword(devbusfn, 0xA8, 0x43924392);
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pci_write_config_dword(devbusfn, 0xAC, 0x40094009);
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/* IDE1 */
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pci_write_config_byte(devbusfn, 0xB1, 0x02);
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pci_write_config_word(devbusfn, 0xB2, 0x328A);
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pci_write_config_dword(devbusfn, 0xB4, 0x62DD62DD);
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pci_write_config_dword(devbusfn, 0xB8, 0x43924392);
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pci_write_config_dword(devbusfn, 0xBC, 0x40094009);
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}
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return (status);
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}
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void ide_set_reset (int flag) {
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return;
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}
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