SRICHARAN R 42d4f37b79 ARM: OMAP5: DDR3: Change io settings ... The change from 0x64656465 to 0x64646464 is to remove the weak pull enabled on DQS, nDQS lines. This pulls the differential signals in the same direction which is not intended. So disabling the weak pulls improves signal integrity. On the uEVM there are 4 DDR3 devices. The VREF for 2 of the devices is powered by the OMAP's VREF_CA_OUT pins. The VREF on the other 2 devices is powered by the OMAP's VREF_DQ_OUT pins. So the net effect here is that only half of the DDR3 devices were being supplied a VREF! This was clearly a mistake. The second change improves the robustness of the interface and was specifically seen to cure corruption observed at high temperatures on some boards. With the above two changes better memory stability was observed with extended temperature ranges around 100C. Signed-off-by: Sricharan R <r.sricharan@ti.com>		2013-11-01 15:56:00 -04:00
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clock.h	ARM: OMAP5: USB: Add OMAP5 common USB EHCI information	2013-08-26 21:55:46 +02:00
cpu.h	ARM: DRA7xx: Add CPSW support to DRA7xx EVM	2013-07-26 16:39:11 -04:00
ehci.h	arm: omap5: echi: Add GPL-2.0+ SPDX-License-Identifier	2013-09-20 10:30:54 -04:00
gpio.h	SPDX-License-Identifier: fixing some problematic GPL-2.0 files	2013-08-19 15:34:13 -04:00
i2c.h	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
mmc_host_def.h	omap: consolidate common mmc definitions	2013-03-08 16:41:12 -05:00
mux_dra7xx.h	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
mux_omap5.h	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
omap.h	ARM: OMAP5: DDR3: Change io settings	2013-11-01 15:56:00 -04:00
spl.h	dra7xx_evm: Enabled UART-boot mode and add dra7xx_evm_uart3 build	2013-11-01 15:56:00 -04:00
sys_proto.h	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00