mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 10:59:43 +09:00
84dee301c3
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Acked-by: Tom Rini <trini@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/gpio/Makefile
167 lines
4.2 KiB
C
167 lines
4.2 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2009
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <config.h>
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#include <common.h>
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#include <malloc.h>
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#include <i2c.h>
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#include <mmc.h>
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#include <asm/types.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/db8500_pincfg.h>
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#include "db8500_pins.h"
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/*
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* Get a global data pointer
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*/
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Memory controller register
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*/
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#define DMC_BASE_ADDR 0x80156000
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#define DMC_CTL_97 (DMC_BASE_ADDR + 0x184)
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/*
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* GPIO pin config common for MOP500/HREF boards
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*/
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unsigned long gpio_cfg_common[] = {
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/* I2C */
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GPIO147_I2C0_SCL,
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GPIO148_I2C0_SDA,
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GPIO16_I2C1_SCL,
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GPIO17_I2C1_SDA,
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GPIO10_I2C2_SDA,
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GPIO11_I2C2_SCL,
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GPIO229_I2C3_SDA,
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GPIO230_I2C3_SCL,
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/* SSP0, to AB8500 */
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GPIO143_SSP0_CLK,
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GPIO144_SSP0_FRM,
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GPIO145_SSP0_RXD | PIN_PULL_DOWN,
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GPIO146_SSP0_TXD,
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/* MMC0 (MicroSD card) */
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GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH,
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GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH,
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GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH,
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GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH,
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GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL,
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GPIO23_MC0_CLK | PIN_OUTPUT_LOW,
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GPIO24_MC0_CMD | PIN_INPUT_PULLUP,
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GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP,
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GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP,
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GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP,
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GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP,
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/* MMC4 (On-board eMMC) */
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GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP,
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GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP,
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GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP,
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GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP,
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GPIO201_MC4_CMD | PIN_INPUT_PULLUP,
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GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL,
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GPIO203_MC4_CLK | PIN_OUTPUT_LOW,
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GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP,
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GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP,
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GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP,
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GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP,
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/* UART2, console */
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GPIO29_U2_RXD | PIN_INPUT_PULLUP,
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GPIO30_U2_TXD | PIN_OUTPUT_HIGH,
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GPIO31_U2_CTSn | PIN_INPUT_PULLUP,
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GPIO32_U2_RTSn | PIN_OUTPUT_HIGH,
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/*
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* USB, pin 256-267 USB, Is probably already setup correctly from
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* BootROM/boot stages, but we don't trust that and set it up anyway
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*/
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GPIO256_USB_NXT,
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GPIO257_USB_STP,
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GPIO258_USB_XCLK,
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GPIO259_USB_DIR,
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GPIO260_USB_DAT7,
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GPIO261_USB_DAT6,
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GPIO262_USB_DAT5,
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GPIO263_USB_DAT4,
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GPIO264_USB_DAT3,
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GPIO265_USB_DAT2,
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GPIO266_USB_DAT1,
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GPIO267_USB_DAT0,
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};
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unsigned long gpio_cfg_snowball[] = {
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/* MMC0 (MicroSD card) */
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GPIO217_GPIO | PIN_OUTPUT_HIGH, /* MMC_EN */
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GPIO218_GPIO | PIN_INPUT_NOPULL, /* MMC_CD */
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GPIO228_GPIO | PIN_OUTPUT_HIGH, /* SD_SEL */
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/* eMMC */
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GPIO167_GPIO | PIN_OUTPUT_HIGH, /* RSTn_MLC */
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/* LAN */
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GPIO131_SM_ADQ8,
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GPIO132_SM_ADQ9,
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GPIO133_SM_ADQ10,
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GPIO134_SM_ADQ11,
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GPIO135_SM_ADQ12,
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GPIO136_SM_ADQ13,
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GPIO137_SM_ADQ14,
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GPIO138_SM_ADQ15,
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/* RSTn_LAN */
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GPIO141_GPIO | PIN_OUTPUT_HIGH,
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};
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/*
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* Miscellaneous platform dependent initialisations
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*/
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int board_init(void)
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{
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/*
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* Setup board (bd) and board-info (bi).
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* bi_arch_number: Unique id for this board. It will passed in r1 to
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* Linux startup code and is the machine_id.
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* bi_boot_params: Where this board expects params.
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*/
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gd->bd->bi_arch_number = MACH_TYPE_SNOWBALL;
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gd->bd->bi_boot_params = 0x00000100;
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/* Configure GPIO pins needed by U-boot */
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db8500_gpio_config_pins(gpio_cfg_common, ARRAY_SIZE(gpio_cfg_common));
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db8500_gpio_config_pins(gpio_cfg_snowball,
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ARRAY_SIZE(gpio_cfg_snowball));
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return 0;
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->ram_size = gd->bd->bi_dram[0].size =
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get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
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return 0;
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}
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