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https://github.com/brain-hackers/u-boot-brain
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e585bef17f
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a clock driver that communicates to the system controller over the TI SCI protocol for performing clock management of various devices present on the SoC. Various clock functionality is achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/clk/keystone/sci-clk.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> |
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| .. | ||
| microchip,pic32-clock.txt | ||
| nvidia,tegra20-car.txt | ||
| rockchip,rk3188-cru.txt | ||
| rockchip,rk3288-cru.txt | ||
| rockchip,rk3288-dmc.txt | ||
| rockchip,rk3368-dmc.txt | ||
| rockchip,rk3399-dmc.txt | ||
| rockchip.txt | ||
| snps,hsdk-cgu.txt | ||
| st,stm32-rcc.txt | ||
| st,stm32h7-rcc.txt | ||
| st,stm32mp1.txt | ||
| ti,sci-clk.txt | ||