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![Siva Durga Prasad Paladugu](/assets/img/avatar_default.png)
This patch adds PL bitstream load support for Versal platform. The PL bitstream is loaded by making an SMC to ATF which in turn communicates with platform firmware which configures and loads PL bitstream on to PL. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
89 lines
2.5 KiB
Plaintext
89 lines
2.5 KiB
Plaintext
menu "FPGA support"
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config FPGA
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bool
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config FPGA_ALTERA
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bool "Enable Altera FPGA drivers"
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select FPGA
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help
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Say Y here to enable the Altera FPGA driver
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This provides basic infrastructure to support Altera FPGA devices.
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Enable Altera FPGA specific functions which includes bitstream
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(in BIT format), fpga and device validation.
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config FPGA_SOCFPGA
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bool "Enable Gen5 and Arria10 common FPGA drivers"
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select FPGA_ALTERA
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help
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Say Y here to enable the Gen5 and Arria10 common FPGA driver
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This provides common functionality for Gen5 and Arria10 devices.
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config FPGA_CYCLON2
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bool "Enable Altera FPGA driver for Cyclone II"
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depends on FPGA_ALTERA
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help
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Say Y here to enable the Altera Cyclone II FPGA specific driver
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This provides common functionality for Altera Cyclone II devices.
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Enable FPGA driver for loading bitstream in BIT and BIN format
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on Altera Cyclone II device.
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config FPGA_STRATIX10
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bool "Enable Altera FPGA driver for Stratix 10"
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depends on TARGET_SOCFPGA_STRATIX10
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select FPGA_ALTERA
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help
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Say Y here to enable the Altera Stratix 10 FPGA specific driver
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This provides common functionality for Altera Stratix 10 devices.
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Enable FPGA driver for writing bitstream into Altera Stratix10
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device.
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config FPGA_XILINX
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bool "Enable Xilinx FPGA drivers"
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select FPGA
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help
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Enable Xilinx FPGA specific functions which includes bitstream
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(in BIT format), fpga and device validation.
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config FPGA_ZYNQMPPL
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bool "Enable Xilinx FPGA driver for ZynqMP"
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depends on FPGA_XILINX
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help
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Enable FPGA driver for loading bitstream in BIT and BIN format
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on Xilinx Zynq UltraScale+ (ZynqMP) device.
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config FPGA_VERSALPL
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bool "Enable Xilinx FPGA driver for Versal"
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depends on FPGA_XILINX
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help
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Enable FPGA driver for loading bitstream in PDI format on Xilinx
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Versal device. PDI is a new programmable device image format for
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Versal. The bitstream will only be generated as PDI for Versal
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platform.
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config FPGA_SPARTAN3
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bool "Enable Spartan3 FPGA driver"
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depends on FPGA_XILINX
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help
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Enable Spartan3 FPGA driver for loading in BIT format.
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config FPGA_VIRTEX2
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bool "Enable Xilinx Virtex-II and later FPGA driver"
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depends on FPGA_XILINX
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help
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Enable Virtex-II FPGA driver for loading in BIT format. This driver
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also supports many newer Xilinx FPGA families.
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config FPGA_ZYNQPL
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bool "Enable Xilinx FPGA for Zynq"
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depends on ARCH_ZYNQ
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help
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Enable FPGA driver for loading bitstream in BIT and BIN format
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on Xilinx Zynq devices.
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endmenu
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