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https://github.com/brain-hackers/u-boot-brain
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![Stephen Warren](/assets/img/avatar_default.png)
There are currently many places that define the list of all Tegra GPIOs; the DT binding header and custom Tegra-specific header file gpio.h. Fix the redundancy by replacing everything with the DT binding header file. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
55 lines
1.2 KiB
C
55 lines
1.2 KiB
C
/*
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* (C) Copyright 2014
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* Stefan Agner <stefan@agner.ch>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/gp_padctrl.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch-tegra/ap.h>
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#include <asm/arch-tegra/tegra.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <i2c.h>
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#include "pinmux-config-colibri_t30.h"
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int arch_misc_init(void)
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{
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if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
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NVBOOTTYPE_RECOVERY)
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printf("USB recovery mode\n");
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return 0;
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}
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_config_pingrp_table(tegra3_pinmux_common,
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ARRAY_SIZE(tegra3_pinmux_common));
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pinmux_config_pingrp_table(unused_pins_lowpower,
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ARRAY_SIZE(unused_pins_lowpower));
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/* Initialize any non-default pad configs (APB_MISC_GP regs) */
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pinmux_config_drvgrp_table(colibri_t30_padctrl,
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ARRAY_SIZE(colibri_t30_padctrl));
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}
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/*
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* Enable AX88772B USB to LAN controller
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*/
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void pin_mux_usb(void)
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{
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/* Reset ASIX using LAN_RESET */
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gpio_request(TEGRA_GPIO(DD, 0), "LAN_RESET");
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gpio_direction_output(TEGRA_GPIO(DD, 0), 0);
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udelay(5);
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gpio_set_value(TEGRA_GPIO(DD, 0), 1);
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}
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