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u-boot-brain/board/altera
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Chin Liang See 0db1ac47ee arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1 
Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27 08:03:08 +02:00
..
arria5-socdk arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1 2016-10-27 08:03:08 +02:00
cyclone5-socdk arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1 2016-10-27 08:03:08 +02:00
nios2 nios2: add 3c120 and 10m50 devboards MAINTAINERS 2015-11-12 08:26:59 +08:00