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https://github.com/brain-hackers/u-boot-brain
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41575d8e4c
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
166 lines
3.2 KiB
C
166 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2019, Linaro Limited
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*/
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#define LOG_CATEGORY UCLASS_RNG
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <log.h>
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#include <reset.h>
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#include <rng.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#define RNG_CR 0x00
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#define RNG_CR_RNGEN BIT(2)
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#define RNG_CR_CED BIT(5)
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#define RNG_SR 0x04
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#define RNG_SR_SEIS BIT(6)
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#define RNG_SR_CEIS BIT(5)
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#define RNG_SR_SECS BIT(2)
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#define RNG_SR_DRDY BIT(0)
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#define RNG_DR 0x08
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struct stm32_rng_platdata {
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fdt_addr_t base;
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struct clk clk;
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struct reset_ctl rst;
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};
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static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
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{
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int retval, i;
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u32 sr, count, reg;
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size_t increment;
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struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
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while (len > 0) {
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retval = readl_poll_timeout(pdata->base + RNG_SR, sr,
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sr & RNG_SR_DRDY, 10000);
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if (retval)
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return retval;
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if (sr & (RNG_SR_SEIS | RNG_SR_SECS)) {
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/* As per SoC TRM */
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clrbits_le32(pdata->base + RNG_SR, RNG_SR_SEIS);
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for (i = 0; i < 12; i++)
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readl(pdata->base + RNG_DR);
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if (readl(pdata->base + RNG_SR) & RNG_SR_SEIS) {
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log_err("RNG Noise");
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return -EIO;
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}
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/* start again */
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continue;
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}
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/*
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* Once the DRDY bit is set, the RNG_DR register can
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* be read four consecutive times.
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*/
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count = 4;
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while (len && count) {
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reg = readl(pdata->base + RNG_DR);
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memcpy(data, ®, min(len, sizeof(u32)));
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increment = min(len, sizeof(u32));
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data += increment;
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len -= increment;
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count--;
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}
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}
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return 0;
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}
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static int stm32_rng_init(struct stm32_rng_platdata *pdata)
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{
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int err;
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err = clk_enable(&pdata->clk);
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if (err)
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return err;
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/* Disable CED */
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writel(RNG_CR_RNGEN | RNG_CR_CED, pdata->base + RNG_CR);
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/* clear error indicators */
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writel(0, pdata->base + RNG_SR);
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return 0;
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}
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static int stm32_rng_cleanup(struct stm32_rng_platdata *pdata)
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{
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writel(0, pdata->base + RNG_CR);
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return clk_disable(&pdata->clk);
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}
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static int stm32_rng_probe(struct udevice *dev)
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{
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struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
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reset_assert(&pdata->rst);
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udelay(20);
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reset_deassert(&pdata->rst);
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return stm32_rng_init(pdata);
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}
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static int stm32_rng_remove(struct udevice *dev)
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{
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struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
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return stm32_rng_cleanup(pdata);
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}
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static int stm32_rng_ofdata_to_platdata(struct udevice *dev)
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{
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struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
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int err;
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pdata->base = dev_read_addr(dev);
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if (!pdata->base)
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return -ENOMEM;
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err = clk_get_by_index(dev, 0, &pdata->clk);
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if (err)
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return err;
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err = reset_get_by_index(dev, 0, &pdata->rst);
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if (err)
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return err;
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return 0;
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}
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static const struct dm_rng_ops stm32_rng_ops = {
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.read = stm32_rng_read,
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};
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static const struct udevice_id stm32_rng_match[] = {
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{
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.compatible = "st,stm32-rng",
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},
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{},
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};
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U_BOOT_DRIVER(stm32_rng) = {
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.name = "stm32-rng",
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.id = UCLASS_RNG,
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.of_match = stm32_rng_match,
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.ops = &stm32_rng_ops,
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.probe = stm32_rng_probe,
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.remove = stm32_rng_remove,
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.platdata_auto = sizeof(struct stm32_rng_platdata),
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.ofdata_to_platdata = stm32_rng_ofdata_to_platdata,
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};
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