u-boot-brain/arch
Mike Frysinger 4150cec335 Blackfin: split out async setup
We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.

This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
..
arm arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSI 2011-07-04 10:55:28 +02:00
avr32 avr32: add ATAG_BOARDINFO 2011-05-18 07:56:54 +02:00
blackfin Blackfin: split out async setup 2011-07-12 02:17:46 -04:00
m68k Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-04-27 21:48:09 +02:00
microblaze Make STANDALONE_LOAD_ADDR configurable per board 2011-04-12 22:58:32 +02:00
mips MIPS: Move timer code to arch/mips/cpu/$(CPU)/ 2011-05-10 00:12:31 +09:00
nios2 nios2: Make STANDALONE_LOAD_ADDR configurable per board 2011-05-16 21:00:43 -04:00
powerpc powerpc/85xx: remove SERDES4 soft-reset work-around 2011-07-11 13:24:21 -05:00
sh Handle most LDSCRIPT setting centrally 2011-04-30 00:59:47 +02:00
sparc Make STANDALONE_LOAD_ADDR configurable per board 2011-04-12 22:58:32 +02:00
x86 Minor coding style cleanup. 2011-05-19 22:22:44 +02:00
.gitignore update include/asm/ gitignore after move 2010-05-07 00:17:30 +02:00