mirror of
https://github.com/brain-hackers/u-boot-brain
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![Jean-Christophe PLAGNIOL-VILLARD](/assets/img/avatar_default.png)
rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
123 lines
4.4 KiB
C
123 lines
4.4 KiB
C
/*
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* (C) Copyright 2008
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* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
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* This work has been supported by: QTechnology http://qtec.com/
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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#define DEBUG
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#define ET_DEBUG
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*/
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/*CPU*/
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#define CONFIG_XILINX_ML507 1
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#define CONFIG_XILINX_440 1
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#define CONFIG_440 1
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#define CONFIG_4xx 1
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#include "../board/xilinx/ml507/xparameters.h"
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/*Mem Map*/
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#define CFG_SDRAM_BASE 0x0
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#define CFG_SDRAM_SIZE_MB 256
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_LEN ( 192 * 1024 )
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#define CFG_MALLOC_LEN ( CFG_ENV_SIZE + 128 * 1024 )
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/*Uart*/
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#define CONFIG_XILINX_UARTLITE
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#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE
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#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE }
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#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR
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/*Cmd*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_JFFS2
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#define CONFIG_JFFS2_CMDLINE
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#undef CONFIG_CMD_I2C
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#undef CONFIG_CMD_DTT
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_PING
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#undef CONFIG_CMD_DHCP
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#undef CONFIG_CMD_EEPROM
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#undef CONFIG_CMD_IMLS
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/*Env*/
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#define CFG_ENV_IS_IN_FLASH
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#define CFG_ENV_SIZE 0x20000
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#define CFG_ENV_SECT_SIZE 0x20000
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#define CFG_ENV_OFFSET 0x340000
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#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET)
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/*Misc*/
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 )
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
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#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */
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#define CFG_LOAD_ADDR 0x00400000 /* default load address */
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#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
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#define CONFIG_CMDLINE_EDITING /* add command line history */
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#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
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#define CONFIG_LOOPW /* enable loopw command */
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#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
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#define CONFIG_VERSION_VARIABLE /* include version env variable */
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#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */
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#define CFG_HUSH_PARSER /* Use the HUSH parser */
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#define CFG_PROMPT_HUSH_PS2 "> "
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#define CONFIG_LOADS_ECHO /* echo on for serial download */
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#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */
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#define CFG_BOOTMAPSZ ( 8 << 20 ) /* Initial Memory map for Linux */
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#define CONFIG_PREBOOT "echo U-Boot is up and runnining;"
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/*Stack*/
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#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */
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#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
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#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
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#define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE )
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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/*Speed*/
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#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ
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/*Flash*/
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#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR
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#define CFG_FLASH_SIZE (32*1024*1024)
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#define CFG_FLASH_CFI 1
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CFG_FLASH_EMPTY_INFO 1
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#define CFG_MAX_FLASH_BANKS 1
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#define CFG_MAX_FLASH_SECT 259
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#define CFG_FLASH_PROTECTION
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#define MTDIDS_DEFAULT "nor0=ml507-flash"
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#define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)"
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#endif /* __CONFIG_H */
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