mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-22 09:58:52 +09:00
![Cyrille Pitchen](/assets/img/avatar_default.png)
Fix the following: - use "jedec,spi-nor" binding, we use jedec compatible flashes - set bus width to 4, we use quad capable flashes - differentiate bewteen data and clk and cs pins - drop partions as we don't use them in u-boot. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> [tudor.ambarus@microchip.com: use "jedec,spi-nor", edit commit message] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
293 lines
6.6 KiB
Plaintext
293 lines
6.6 KiB
Plaintext
/dts-v1/;
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#include "sama5d2.dtsi"
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#include "sama5d2-pinfunc.h"
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/ {
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model = "Atmel SAMA5D2 Xplained";
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compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
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chosen {
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u-boot,dm-pre-reloc;
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stdout-path = &uart1;
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};
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onewire_tm: onewire {
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gpios = <&pioA PIN_PB0 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_onewire_tm_default>;
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status = "okay";
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w1_eeprom: w1_eeprom@0 {
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compatible = "maxim,ds24b33";
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status = "okay";
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};
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};
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ahb {
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usb1: ohci@00400000 {
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num-ports = <3>;
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atmel,vbus-gpio = <&pioA 42 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_default>;
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status = "okay";
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};
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usb2: ehci@00500000 {
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status = "okay";
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};
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sdmmc0: sdio-host@a0000000 {
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bus-width = <8>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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sdmmc1: sdio-host@b0000000 {
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
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status = "okay"; /* conflict with qspi0 */
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u-boot,dm-pre-reloc;
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};
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apb {
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hlcdc: hlcdc@f0000000 {
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atmel,vl-bpix = <4>;
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atmel,guard-time = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
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status = "okay";
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u-boot,dm-pre-reloc;
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display-timings {
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u-boot,dm-pre-reloc;
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480x272 {
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clock-frequency = <9000000>;
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hactive = <480>;
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vactive = <272>;
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hsync-len = <41>;
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hfront-porch = <2>;
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hback-porch = <2>;
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vfront-porch = <2>;
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vback-porch = <2>;
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vsync-len = <11>;
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u-boot,dm-pre-reloc;
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};
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};
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};
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qspi0: spi@f0020000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi0_sck_cs_default &pinctrl_qspi0_dat_default>;
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status = "okay";
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u-boot,dm-pre-reloc;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <83000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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u-boot,dm-pre-reloc;
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};
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};
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spi0: spi@f8000000 {
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cs-gpios = <&pioA 17 0>, <0>, <0>, <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0_default>;
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status = "okay";
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u-boot,dm-pre-reloc;
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spi_flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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u-boot,dm-pre-reloc;
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};
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};
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macb0: ethernet@f8008000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
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phy-mode = "rmii";
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status = "okay";
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ethernet-phy@1 {
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reg = <0x1>;
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};
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};
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uart1: serial@f8020000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_default>;
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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i2c1: i2c@fc028000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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status = "okay";
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i2c_eeprom: i2c_eeprom@5c {
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compatible = "atmel,24mac402";
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reg = <0x5c>;
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};
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};
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pioA: gpio@fc038000 {
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pinctrl {
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pinctrl_i2c1_default: i2c1_default {
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pinmux = <PIN_PD4__TWD1>,
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<PIN_PD5__TWCK1>;
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bias-disable;
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};
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pinctrl_lcd_base: pinctrl_lcd_base {
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pinmux = <PIN_PC30__LCDVSYNC>,
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<PIN_PC31__LCDHSYNC>,
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<PIN_PD1__LCDDEN>,
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<PIN_PD0__LCDPCK>;
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bias-disable;
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};
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pinctrl_lcd_pwm: pinctrl_lcd_pwm {
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pinmux = <PIN_PC28__LCDPWM>;
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bias-disable;
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};
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pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
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pinmux = <PIN_PC10__LCDDAT2>,
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<PIN_PC11__LCDDAT3>,
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<PIN_PC12__LCDDAT4>,
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<PIN_PC13__LCDDAT5>,
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<PIN_PC14__LCDDAT6>,
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<PIN_PC15__LCDDAT7>,
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<PIN_PC16__LCDDAT10>,
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<PIN_PC17__LCDDAT11>,
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<PIN_PC18__LCDDAT12>,
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<PIN_PC19__LCDDAT13>,
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<PIN_PC20__LCDDAT14>,
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<PIN_PC21__LCDDAT15>,
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<PIN_PC22__LCDDAT18>,
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<PIN_PC23__LCDDAT19>,
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<PIN_PC24__LCDDAT20>,
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<PIN_PC25__LCDDAT21>,
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<PIN_PC26__LCDDAT22>,
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<PIN_PC27__LCDDAT23>;
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bias-disable;
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};
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pinctrl_macb0_phy_irq: macb0_phy_irq {
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pinmux = <PIN_PC9__GPIO>;
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bias-disable;
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};
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pinctrl_macb0_rmii: macb0_rmii {
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pinmux = <PIN_PB14__GTXCK>,
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<PIN_PB15__GTXEN>,
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<PIN_PB16__GRXDV>,
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<PIN_PB17__GRXER>,
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<PIN_PB18__GRX0>,
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<PIN_PB19__GRX1>,
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<PIN_PB20__GTX0>,
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<PIN_PB21__GTX1>,
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<PIN_PB22__GMDC>,
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<PIN_PB23__GMDIO>;
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bias-disable;
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};
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pinctrl_qspi0_sck_cs_default: qspi0_sck_cs_default {
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pinmux = <PIN_PA22__QSPI0_SCK>,
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<PIN_PA23__QSPI0_CS>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_qspi0_dat_default: qspi0_dat_default {
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pinmux = <PIN_PA24__QSPI0_IO0>,
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<PIN_PA25__QSPI0_IO1>,
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<PIN_PA26__QSPI0_IO2>,
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<PIN_PA27__QSPI0_IO3>;
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bias-pull-up;
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
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pinmux = <PIN_PA1__SDMMC0_CMD>,
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<PIN_PA2__SDMMC0_DAT0>,
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<PIN_PA3__SDMMC0_DAT1>,
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<PIN_PA4__SDMMC0_DAT2>,
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<PIN_PA5__SDMMC0_DAT3>,
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<PIN_PA6__SDMMC0_DAT4>,
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<PIN_PA7__SDMMC0_DAT5>,
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<PIN_PA8__SDMMC0_DAT6>,
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<PIN_PA9__SDMMC0_DAT7>;
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bias-pull-up;
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
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pinmux = <PIN_PA0__SDMMC0_CK>,
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<PIN_PA10__SDMMC0_RSTN>,
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<PIN_PA11__SDMMC0_VDDSEL>,
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<PIN_PA13__SDMMC0_CD>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
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pinmux = <PIN_PA28__SDMMC1_CMD>,
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<PIN_PA18__SDMMC1_DAT0>,
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<PIN_PA19__SDMMC1_DAT1>,
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<PIN_PA20__SDMMC1_DAT2>,
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<PIN_PA21__SDMMC1_DAT3>;
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bias-pull-up;
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
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pinmux = <PIN_PA22__SDMMC1_CK>,
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<PIN_PA30__SDMMC1_CD>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_spi0_default: spi0_default {
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pinmux = <PIN_PA14__SPI0_SPCK>,
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<PIN_PA15__SPI0_MOSI>,
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<PIN_PA16__SPI0_MISO>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_uart1_default: uart1_default {
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pinmux = <PIN_PD2__URXD1>,
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<PIN_PD3__UTXD1>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_usb_default: usb_default {
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pinmux = <PIN_PB10__GPIO>;
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bias-disable;
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};
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pinctrl_usba_vbus: usba_vbus {
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pinmux = <PIN_PA31__GPIO>;
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bias-disable;
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};
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pinctrl_onewire_tm_default: onewire_tm_default {
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pinmux = <PIN_PB0__GPIO>;
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bias-pull-up;
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};
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};
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};
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};
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};
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};
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