191 lines
4.6 KiB
Plaintext
191 lines
4.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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//
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// Copyright (C) 2020 PHYTEC Messtechnik GmbH
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// Author: Jens Lang <J.Lang@phytec.de>
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// Copyright (C) 2021 Fabio Estevam <festevam@denx.de>
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/dts-v1/;
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#include "imx7d.dtsi"
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/ {
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model = "Storopack SMEGW01 board";
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compatible = "storopack,imx7d-smegw01", "fsl,imx7d";
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aliases {
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mmc0 = &usdhc1;
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mmc1 = &usdhc3;
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};
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chosen {
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stdout-path = &uart1;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x20000000>;
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
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<&clks IMX7D_ENET1_TIME_ROOT_CLK>;
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assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
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assigned-clock-rates = <0>, <100000000>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio: mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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enable-sdio-wakeup;
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keep-power-in-suspend;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
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assigned-clock-rates = <400000000>;
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max-frequency = <200000000>;
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bus-width = <8>;
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fsl,tuning-step = <1>;
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non-removable;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-mmc-hw-reset;
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mmc-hs200-1_8v;
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mmc-ddr-1_8v;
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sd-uhs-ddr50;
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sd-uhs-sdr104;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x5
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MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x5
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MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x5
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MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x5
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MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x5
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MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x5
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MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x5
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MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x5
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MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x5
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MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x5
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MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x5
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MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x5
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MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x7
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MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x7
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x74
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MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x7c
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>;
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};
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pinctrl_usdhc1: usdhc1 {
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fsl,pins = <
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MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59
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MX7D_PAD_SD1_CMD__SD1_CMD 0x59
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MX7D_PAD_SD1_CLK__SD1_CLK 0x19
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MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
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MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
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MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
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MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
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>;
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};
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pinctrl_usdhc3: usdhc3 {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5d
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1d
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5d
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5d
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5d
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5d
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5d
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5d
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5d
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5d
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1d
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3_100mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5e
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1e
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5e
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5e
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5e
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5e
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5e
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5e
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5e
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5e
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1e
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3_200mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5f
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MX7D_PAD_SD3_CLK__SD3_CLK 0x0f
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5f
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5f
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5f
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5f
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5f
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5f
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5f
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5f
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1f
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>;
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};
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};
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&iomuxc_lpsr {
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
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>;
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};
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};
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