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![Simon Glass](/assets/img/avatar_default.png)
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
196 lines
5.6 KiB
C
196 lines
5.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2015 Google, Inc
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*
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* Taken from coreboot file of the same name
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*/
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#ifndef _X86_MP_H_
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#define _X86_MP_H_
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#include <asm/atomic.h>
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#include <asm/cache.h>
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struct udevice;
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enum {
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/* Indicates that the function should run on all CPUs */
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MP_SELECT_ALL = -1,
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/* Run on boot CPUs */
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MP_SELECT_BSP = -2,
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/* Run on non-boot CPUs */
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MP_SELECT_APS = -3,
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};
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typedef int (*mp_callback_t)(struct udevice *cpu, void *arg);
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/*
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* A mp_flight_record details a sequence of calls for the APs to perform
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* along with the BSP to coordinate sequencing. Each flight record either
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* provides a barrier for each AP before calling the callback or the APs
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* are allowed to perform the callback without waiting. Regardless, each
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* record has the cpus_entered field incremented for each record. When
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* the BSP observes that the cpus_entered matches the number of APs
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* the bsp_call is called with bsp_arg and upon returning releases the
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* barrier allowing the APs to make further progress.
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*
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* Note that ap_call() and bsp_call() can be NULL. In the NULL case the
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* callback will just not be called.
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*
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* @barrier: Ensures that the BSP and AP don't run the flight record at the same
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* time
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* @cpus_entered: Counts the number of APs that have run this record
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* @ap_call: Function for the APs to call
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* @ap_arg: Argument to pass to @ap_call
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* @bsp_call: Function for the BSP to call
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* @bsp_arg: Argument to pass to @bsp_call
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*/
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struct mp_flight_record {
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atomic_t barrier;
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atomic_t cpus_entered;
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mp_callback_t ap_call;
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void *ap_arg;
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mp_callback_t bsp_call;
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void *bsp_arg;
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} __attribute__((aligned(ARCH_DMA_MINALIGN)));
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#define MP_FLIGHT_RECORD(barrier_, ap_func_, ap_arg_, bsp_func_, bsp_arg_) \
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{ \
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.barrier = ATOMIC_INIT(barrier_), \
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.cpus_entered = ATOMIC_INIT(0), \
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.ap_call = ap_func_, \
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.ap_arg = ap_arg_, \
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.bsp_call = bsp_func_, \
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.bsp_arg = bsp_arg_, \
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}
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#define MP_FR_BLOCK_APS(ap_func, ap_arg, bsp_func, bsp_arg) \
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MP_FLIGHT_RECORD(0, ap_func, ap_arg, bsp_func, bsp_arg)
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#define MP_FR_NOBLOCK_APS(ap_func, ap_arg, bsp_func, bsp_arg) \
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MP_FLIGHT_RECORD(1, ap_func, ap_arg, bsp_func, bsp_arg)
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/*
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* mp_init() will set up the SIPI vector and bring up the APs according to
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* mp_params. Each flight record will be executed according to the plan. Note
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* that the MP infrastructure uses SMM default area without saving it. It's
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* up to the chipset or mainboard to either e820 reserve this area or save this
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* region prior to calling mp_init() and restoring it after mp_init returns.
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*
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* At the time mp_init() is called the MTRR MSRs are mirrored into APs then
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* caching is enabled before running the flight plan.
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*
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* The MP init has the following properties:
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* 1. APs are brought up in parallel.
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* 2. The ordering of cpu number and APIC ids is not deterministic.
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* Therefore, one cannot rely on this property or the order of devices in
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* the device tree unless the chipset or mainboard know the APIC ids
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* a priori.
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*
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* mp_init() returns < 0 on error, 0 on success.
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*/
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int mp_init(void);
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/**
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* x86_mp_init() - Set up additional CPUs
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*
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* @returns < 0 on error, 0 on success.
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*/
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int x86_mp_init(void);
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/**
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* mp_run_func() - Function to call on the AP
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*
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* @arg: Argument to pass
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*/
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typedef void (*mp_run_func)(void *arg);
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#if CONFIG_IS_ENABLED(SMP) && !CONFIG_IS_ENABLED(X86_64)
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/**
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* mp_run_on_cpus() - Run a function on one or all CPUs
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*
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* This does not return until all CPUs have completed the work
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*
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* Running on anything other than the boot CPU is only supported if
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* CONFIG_SMP_AP_WORK is enabled
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*
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* @cpu_select: CPU to run on (its dev_seq() value), or MP_SELECT_ALL for
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* all, or MP_SELECT_BSP for BSP
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* @func: Function to run
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* @arg: Argument to pass to the function
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* @return 0 on success, -ve on error
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*/
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int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg);
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/**
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* mp_park_aps() - Park the APs ready for the OS
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*
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* This halts all CPUs except the main one, ready for the OS to use them
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*
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* @return 0 if OK, -ve on error
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*/
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int mp_park_aps(void);
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/**
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* mp_first_cpu() - Get the first CPU to process, from a selection
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*
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* This is used to iterate through selected CPUs. Call this function first, then
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* call mp_next_cpu() repeatedly (with the same @cpu_select) until it returns
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* -EFBIG.
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*
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* @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...)
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* @return next CPU number to run on (e.g. 0)
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*/
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int mp_first_cpu(int cpu_select);
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/**
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* mp_next_cpu() - Get the next CPU to process, from a selection
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*
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* This is used to iterate through selected CPUs. After first calling
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* mp_first_cpu() once, call this function repeatedly until it returns -EFBIG.
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*
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* The value of @cpu_select must be the same for all calls and must match the
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* value passed to mp_first_cpu(), otherwise the behaviour is undefined.
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*
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* @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...)
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* @prev_cpu: Previous value returned by mp_first_cpu()/mp_next_cpu()
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* @return next CPU number to run on (e.g. 0)
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*/
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int mp_next_cpu(int cpu_select, int prev_cpu);
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#else
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static inline int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg)
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{
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/* There is only one CPU, so just call the function here */
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func(arg);
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return 0;
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}
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static inline int mp_park_aps(void)
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{
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/* No APs to park */
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return 0;
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}
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static inline int mp_first_cpu(int cpu_select)
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{
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/* We cannot run on any APs, nor a selected CPU */
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return cpu_select == MP_SELECT_APS ? -EFBIG : MP_SELECT_BSP;
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}
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static inline int mp_next_cpu(int cpu_select, int prev_cpu)
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{
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/*
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* When MP is not enabled, there is only one CPU and we did it in
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* mp_first_cpu()
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*/
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return -EFBIG;
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}
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#endif
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#endif /* _X86_MP_H_ */
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