mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
2c59412a9f
As there is only one linker script to use in this case, rather than use the BOARDDIR variable hard-code the path. Cc: Lokesh Vutla <lokeshvutla@ti.com> Suggested-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
141 lines
2.6 KiB
Plaintext
141 lines
2.6 KiB
Plaintext
if ARCH_DAVINCI
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choice
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prompt "DaVinci board select"
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optional
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config TARGET_DA850EVM
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bool "DA850 EVM board"
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select MACH_DAVINCI_DA850_EVM
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select SOC_DA850
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select SUPPORT_SPL
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config TARGET_OMAPL138_LCDK
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bool "OMAPL138 LCDK"
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select SOC_DA8XX
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select SUPPORT_SPL
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select SPL_BOARD_INIT
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config TARGET_LEGOEV3
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bool "LEGO MINDSTORMS EV3"
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select MACH_DAVINCI_DA850_EVM
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select SOC_DA850
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endchoice
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config SYS_SOC
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default "davinci"
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config DA850_LOWLEVEL
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bool "Enable Lowlevel DA850 initialization"
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depends on SOC_DA850
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config SYS_DA850_PLL_INIT
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bool
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config SYS_DA850_DDR_INIT
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bool
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config SOC_DA850
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bool
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select SOC_DA8XX
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config SOC_DA8XX
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bool
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select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
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select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
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config MACH_DAVINCI_DA850_EVM
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bool
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if SYS_DA850_PLL_INIT
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comment "DA850 PLL Initialization Parameters"
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config SYS_DV_CLKMODE
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int "PLLCTL Clock Mode"
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default 0
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help
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Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
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config SYS_DA850_PLL0_POSTDIV
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int "PLLC0 PLL Post-Divider"
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default 1
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help
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Value written to PLLC0 PLL Post-Divider Control Register
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config SYS_DA850_PLL0_PLLDIV1
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hex "PLLC0 Divider 1"
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default 0x8000
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help
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Value written to PLLC0 Divider 1 register
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config SYS_DA850_PLL0_PLLDIV2
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hex "PLLC0 Divider 2"
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default 0x8001
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help
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Value written to PLLC0 Divider 2 register
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config SYS_DA850_PLL0_PLLDIV3
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hex "PLLC0 Divider 3"
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default 0x8002
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help
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Value written to PLLC0 Divider 3 register
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config SYS_DA850_PLL0_PLLDIV4
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hex "PLLC0 Divider 4"
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default 0x8003
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help
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Value written to PLLC0 Divider 4 register
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config SYS_DA850_PLL0_PLLDIV5
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hex "PLLC0 Divider 5"
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default 0x8002
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help
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Value written to PLLC0 Divider 5 register
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config SYS_DA850_PLL0_PLLDIV6
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hex "PLLC0 Divider 6"
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default 0x8000
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help
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Value written to PLLC0 Divider 6 register
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config SYS_DA850_PLL0_PLLDIV7
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hex "PLLC0 Divider 7"
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default 0x8005
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help
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Value written to PLLC0 Divider 7 register
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config SYS_DA850_PLL1_POSTDIV
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hex "PLLC1 PLL Post-Divider"
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default 1
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help
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Value written to PLLC1 PLL Post-Divider Control Register
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config SYS_DA850_PLL1_PLLDIV1
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hex "PLLC1 Divider 2"
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default 0x8000
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help
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Value written to PLLC1 Divider 1 register
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config SYS_DA850_PLL1_PLLDIV2
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hex "PLLC1 Divider 2"
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default 0x8001
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help
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Value written to PLLC1 Divider 2 register
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config SYS_DA850_PLL1_PLLDIV3
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hex "PLLC1 Divider 3"
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default 0x8002
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help
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Value written to PLLC1 Divider 3 register
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endif
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source "board/davinci/da8xxevm/Kconfig"
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source "board/lego/ev3/Kconfig"
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config SPL_LDSCRIPT
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default "board/davinci/da8xxevm/u-boot-spl-da850evm.lds"
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endif
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