York Sun 4c99cb9190 powerpc/mpc8xxx: fix DDR data width checking ... Checking width before setting DDR controller. SPD for DDR1 and DDR2 has data width and primary sdram width. The latter one has different meaning for DDR3. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-07-11 13:24:20 -05:00
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arm	arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSI	2011-07-04 10:55:28 +02:00
avr32	avr32: add ATAG_BOARDINFO	2011-05-18 07:56:54 +02:00
blackfin	Blackfin: use on-chip reset func with newer parts	2011-06-03 13:26:45 -04:00
m68k	Merge branch 'master' of git://git.denx.de/u-boot-arm	2011-04-27 21:48:09 +02:00
microblaze	Make STANDALONE_LOAD_ADDR configurable per board	2011-04-12 22:58:32 +02:00
mips	MIPS: Move timer code to arch/mips/cpu/$(CPU)/	2011-05-10 00:12:31 +09:00
nios2	nios2: Make STANDALONE_LOAD_ADDR configurable per board	2011-05-16 21:00:43 -04:00
powerpc	powerpc/mpc8xxx: fix DDR data width checking	2011-07-11 13:24:20 -05:00
sh	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00
sparc	Make STANDALONE_LOAD_ADDR configurable per board	2011-04-12 22:58:32 +02:00
x86	Minor coding style cleanup.	2011-05-19 22:22:44 +02:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00