mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 11:16:15 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Freescale Semiconductor
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*/
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#ifndef __FSL_MC_H__
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#define __FSL_MC_H__
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#include <common.h>
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#define MC_CCSR_BASE_ADDR \
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((struct mc_ccsr_registers __iomem *)0x8340000)
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#define GCR1_P1_STOP BIT(31)
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#define GCR1_P2_STOP BIT(30)
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#define GCR1_P1_DE_RST BIT(23)
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#define GCR1_P2_DE_RST BIT(22)
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#define GCR1_M1_DE_RST BIT(15)
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#define GCR1_M2_DE_RST BIT(14)
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#define GCR1_M_ALL_DE_RST (GCR1_M1_DE_RST | GCR1_M2_DE_RST)
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#define GSR_FS_MASK 0x3fffffff
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#define SOC_MC_PORTALS_BASE_ADDR ((void __iomem *)0x00080C000000)
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#define SOC_QBMAN_PORTALS_BASE_ADDR ((void __iomem *)0x000818000000)
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#define SOC_MC_PORTAL_STRIDE 0x10000
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#define SOC_MC_PORTAL_ADDR(_portal_id) \
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((void __iomem *)((uintptr_t)SOC_MC_PORTALS_BASE_ADDR + \
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(_portal_id) * SOC_MC_PORTAL_STRIDE))
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#define MC_PORTAL_OFFSET_TO_PORTAL_ID(_portal_offset) \
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((_portal_offset) / SOC_MC_PORTAL_STRIDE)
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struct mc_ccsr_registers {
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u32 reg_gcr1;
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u32 reserved1;
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u32 reg_gsr;
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u32 reserved2;
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u32 reg_sicbalr;
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u32 reg_sicbahr;
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u32 reg_sicapr;
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u32 reserved3;
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u32 reg_mcfbalr;
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u32 reg_mcfbahr;
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u32 reg_mcfapr;
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u32 reserved4[0x2f1];
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u32 reg_psr;
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u32 reserved5;
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u32 reg_brr[2];
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u32 reserved6[0x80];
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u32 reg_error[];
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};
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int get_mc_boot_status(void);
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int get_dpl_apply_status(void);
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#ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
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int get_aiop_apply_status(void);
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#endif
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u64 mc_get_dram_addr(void);
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unsigned long mc_get_dram_block_size(void);
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int fsl_mc_ldpaa_init(bd_t *bis);
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int fsl_mc_ldpaa_exit(bd_t *bd);
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void mc_env_boot(void);
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#endif
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