mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
e7b860fa4d
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
18 lines
418 B
INI
18 lines
418 B
INI
/*
|
|
* Copyright 2014 Toradex, Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*
|
|
* Refer docs/README.imxmage for more details about how-to configure
|
|
* and create imximage boot image
|
|
*
|
|
* The syntax is taken as close as possible with the kwbimage
|
|
*/
|
|
#include <asm/imx-common/imximage.cfg>
|
|
|
|
/* image version */
|
|
IMAGE_VERSION 2
|
|
|
|
/* Boot Offset 0x400, valid for both SD and NAND boot */
|
|
BOOT_OFFSET FLASH_OFFSET_STANDARD
|