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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
47 lines
1.3 KiB
C
47 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2011 Andes Technology Corporation
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*/
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/* FTAHBC020S - AHB Controller (Arbiter/Decoder) definitions */
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#ifndef __FTAHBC020S_H
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#define __FTAHBC202S_H
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/* Registers Offsets */
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/*
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* AHB Slave BSR, offset: n * 4, n=0~31
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*/
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#ifndef __ASSEMBLY__
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struct ftahbc02s {
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unsigned int s_bsr[32]; /* 0x00-0x7c - Slave n Base/Size Reg */
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unsigned int pcr; /* 0x80 - Priority Ctrl Reg */
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unsigned int tcrg; /* 0x84 - Transfer Ctrl Reg */
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unsigned int cr; /* 0x88 - Ctrl Reg */
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};
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#endif /* __ASSEMBLY__ */
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/*
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* FTAHBC020S_SLAVE_BSR - Slave n Base / Size Register
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*/
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#define FTAHBC020S_SLAVE_BSR_BASE(x) (((x) & 0xfff) << 20)
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#define FTAHBC020S_SLAVE_BSR_SIZE(x) (((x) & 0xf) << 16)
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/* The value of b(16:19)SLAVE_BSR_SIZE: 1M-2048M, must be power of 2 */
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#define FTAHBC020S_BSR_SIZE(x) (ffs(x) - 1) /* size of Addr Space */
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/*
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* FTAHBC020S_PCR - Priority Control Register
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*/
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#define FTAHBC020S_PCR_PLEVEL_(x) (1 << (x)) /* x: 1-15 */
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/*
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* FTAHBC020S_CR - Interrupt Control Register
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*/
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#define FTAHBC020S_CR_INTSTS (1 << 24)
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#define FTAHBC020S_CR_RESP(x) (((x) & 0x3) << 20)
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#define FTAHBC020S_CR_INTSMASK (1 << 16)
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#define FTAHBC020S_CR_REMAP (1 << 0)
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#endif /* __FTAHBC020S_H */
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