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3eafce0527
u-boot-brain/arch/x86/cpu/ivybridge
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Simon Glass 3eafce0527 x86: ivybridge: Add LAPIC support 
The local advanced programmable interrupt controller is not used much in
U-Boot but we do need to set it up. Add basic support for this, which will
be extended as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 07:34:15 +01:00
..
car.S x86: chromebook_link: Implement CAR support (cache as RAM) 2014-11-21 07:34:11 +01:00
cpu.c x86: ivybridge: Add LAPIC support 2014-11-21 07:34:15 +01:00
early_init.c x86: ivybridge: Add early init for PCH devices 2014-11-21 07:34:14 +01:00
Kconfig x86: Add chromebook_link board 2014-11-21 07:34:11 +01:00
lpc.c x86: ivybridge: Add early LPC init so that serial works 2014-11-21 07:34:12 +01:00
Makefile x86: ivybridge: Add early init for PCH devices 2014-11-21 07:34:14 +01:00
microcode_intel.c x86: ivybridge: Perform Intel microcode update on boot 2014-11-21 07:34:14 +01:00
pci.c x86: ivybridge: Enable PCI in early init 2014-11-21 07:34:12 +01:00
sdram.c x86: Add chromebook_link board 2014-11-21 07:34:11 +01:00