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https://github.com/brain-hackers/u-boot-brain
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2c1e11dd52
RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core from Rockchip. It is designed for varies application scenario such as car DVR, sports DV, secure camera and UAV camera. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
26 lines
910 B
Makefile
26 lines
910 B
Makefile
#
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# (C) Copyright 2016 Cadence Design Systems Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
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obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
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obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
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obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
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endif
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obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
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obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
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obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
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obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o
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obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
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obj-$(CONFIG_ROCKCHIP_RV1108) += sysreset_rv1108.o
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obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
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obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
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obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
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obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
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obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
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