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![Ruchika Gupta](/assets/img/avatar_default.png)
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam. The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to enable initialization of this hardware IP. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
259 lines
7.3 KiB
C
259 lines
7.3 KiB
C
/*
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* CAAM Error Reporting
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*
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* Copyright 2009-2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Derived from error.c file in linux drivers/crypto/caam
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*/
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#include <common.h>
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#include <malloc.h>
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#include "desc.h"
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#include "jr.h"
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#define CAAM_ERROR_STR_MAX 302
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#define JRSTA_SSRC_SHIFT 28
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#define JRSTA_CCBERR_CHAID_MASK 0x00f0
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#define JRSTA_CCBERR_CHAID_SHIFT 4
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#define JRSTA_CCBERR_ERRID_MASK 0x000
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#define JRSTA_CCBERR_CHAID_RNG (0x05 << JRSTA_CCBERR_CHAID_SHIFT)
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#define JRSTA_DECOERR_JUMP 0x08000000
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#define JRSTA_DECOERR_INDEX_SHIFT 8
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#define JRSTA_DECOERR_INDEX_MASK 0xff00
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#define JRSTA_DECOERR_ERROR_MASK 0x00ff
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static const struct {
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u8 value;
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const char *error_text;
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} desc_error_list[] = {
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{ 0x00, "No error." },
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{ 0x01, "SGT Length Error. The descriptor is trying to read" \
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" more data than is contained in the SGT table." },
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{ 0x02, "SGT Null Entry Error." },
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{ 0x03, "Job Ring Control Error. Bad value in Job Ring Control reg." },
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{ 0x04, "Invalid Descriptor Command." },
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{ 0x05, "Reserved." },
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{ 0x06, "Invalid KEY Command" },
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{ 0x07, "Invalid LOAD Command" },
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{ 0x08, "Invalid STORE Command" },
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{ 0x09, "Invalid OPERATION Command" },
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{ 0x0A, "Invalid FIFO LOAD Command" },
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{ 0x0B, "Invalid FIFO STORE Command" },
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{ 0x0C, "Invalid MOVE/MOVE_LEN Command" },
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{ 0x0D, "Invalid JUMP Command" },
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{ 0x0E, "Invalid MATH Command" },
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{ 0x0F, "Invalid SIGNATURE Command" },
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{ 0x10, "Invalid Sequence Command" },
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{ 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
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{ 0x12, "Shared Descriptor Header Error" },
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{ 0x13, "Header Error. Invalid length or parity, or other problems." },
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{ 0x14, "Burster Error. Burster has gotten to an illegal state" },
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{ 0x15, "Context Register Length Error" },
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{ 0x16, "DMA Error" },
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{ 0x17, "Reserved." },
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{ 0x1A, "Job failed due to JR reset" },
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{ 0x1B, "Job failed due to Fail Mode" },
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{ 0x1C, "DECO Watchdog timer timeout error" },
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{ 0x1D, "DECO tried to copy a key from another DECO but" \
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" the other DECO's Key Registers were locked" },
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{ 0x1E, "DECO attempted to copy data from a DECO" \
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"that had an unmasked Descriptor error" },
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{ 0x1F, "LIODN error" },
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{ 0x20, "DECO has completed a reset initiated via the DRR register" },
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{ 0x21, "Nonce error" },
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{ 0x22, "Meta data is too large (> 511 bytes) for TLS decap" },
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{ 0x23, "Read Input Frame error" },
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{ 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
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{ 0x80, "DNR (do not run) error" },
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{ 0x81, "undefined protocol command" },
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{ 0x82, "invalid setting in PDB" },
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{ 0x83, "Anti-replay LATE error" },
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{ 0x84, "Anti-replay REPLAY error" },
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{ 0x85, "Sequence number overflow" },
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{ 0x86, "Sigver invalid signature" },
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{ 0x87, "DSA Sign Illegal test descriptor" },
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{ 0x88, "Protocol Format Error" },
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{ 0x89, "Protocol Size Error" },
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{ 0xC1, "Blob Command error: Undefined mode" },
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{ 0xC2, "Blob Command error: Secure Memory Blob mode error" },
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{ 0xC4, "Blob Command error: Black Blob key or input size error" },
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{ 0xC5, "Blob Command error: Invalid key destination" },
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{ 0xC8, "Blob Command error: Trusted/Secure mode error" },
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{ 0xF0, "IPsec TTL or hop limit field is 0, or was decremented to 0" },
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{ 0xF1, "3GPP HFN matches or exceeds the Threshold" },
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};
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static const char * const cha_id_list[] = {
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"",
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"AES",
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"DES",
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"ARC4",
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"MDHA",
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"RNG",
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"SNOW f8",
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"Kasumi f8/9",
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"PKHA",
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"CRCA",
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"SNOW f9",
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"ZUCE",
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"ZUCA",
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};
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static const char * const err_id_list[] = {
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"No error.",
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"Mode error.",
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"Data size error.",
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"Key size error.",
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"PKHA A memory size error.",
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"PKHA B memory size error.",
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"Data arrived out of sequence error.",
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"PKHA divide-by-zero error.",
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"PKHA modulus even error.",
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"DES key parity error.",
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"ICV check failed.",
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"Hardware error.",
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"Unsupported CCM AAD size.",
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"Class 1 CHA is not reset",
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"Invalid CHA combination was selected",
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"Invalid CHA selected.",
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};
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static const char * const rng_err_id_list[] = {
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"",
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"",
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"",
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"Instantiate",
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"Not instantiated",
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"Test instantiate",
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"Prediction resistance",
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"Prediction resistance and test request",
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"Uninstantiate",
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"Secure key generation",
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};
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static void report_ccb_status(const u32 status,
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const char *error)
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{
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u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
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JRSTA_CCBERR_CHAID_SHIFT;
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u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
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u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
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JRSTA_DECOERR_INDEX_SHIFT;
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char *idx_str;
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const char *cha_str = "unidentified cha_id value 0x";
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char cha_err_code[3] = { 0 };
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const char *err_str = "unidentified err_id value 0x";
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char err_err_code[3] = { 0 };
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if (status & JRSTA_DECOERR_JUMP)
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idx_str = "jump tgt desc idx";
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else
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idx_str = "desc idx";
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if (cha_id < ARRAY_SIZE(cha_id_list))
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cha_str = cha_id_list[cha_id];
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else
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snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
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if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
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err_id < ARRAY_SIZE(rng_err_id_list) &&
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strlen(rng_err_id_list[err_id])) {
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/* RNG-only error */
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err_str = rng_err_id_list[err_id];
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} else if (err_id < ARRAY_SIZE(err_id_list)) {
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err_str = err_id_list[err_id];
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} else {
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snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
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}
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debug("%08x: %s: %s %d: %s%s: %s%s\n",
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status, error, idx_str, idx,
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cha_str, cha_err_code,
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err_str, err_err_code);
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}
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static void report_jump_status(const u32 status,
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const char *error)
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{
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debug("%08x: %s: %s() not implemented\n",
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status, error, __func__);
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}
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static void report_deco_status(const u32 status,
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const char *error)
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{
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u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
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u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
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JRSTA_DECOERR_INDEX_SHIFT;
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char *idx_str;
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const char *err_str = "unidentified error value 0x";
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char err_err_code[3] = { 0 };
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int i;
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if (status & JRSTA_DECOERR_JUMP)
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idx_str = "jump tgt desc idx";
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else
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idx_str = "desc idx";
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for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
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if (desc_error_list[i].value == err_id)
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break;
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if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
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err_str = desc_error_list[i].error_text;
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else
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snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
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debug("%08x: %s: %s %d: %s%s\n",
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status, error, idx_str, idx, err_str, err_err_code);
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}
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static void report_jr_status(const u32 status,
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const char *error)
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{
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debug("%08x: %s: %s() not implemented\n",
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status, error, __func__);
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}
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static void report_cond_code_status(const u32 status,
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const char *error)
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{
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debug("%08x: %s: %s() not implemented\n",
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status, error, __func__);
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}
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void caam_jr_strstatus(u32 status)
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{
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static const struct stat_src {
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void (*report_ssed)(const u32 status,
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const char *error);
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const char *error;
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} status_src[] = {
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{ NULL, "No error" },
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{ NULL, NULL },
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{ report_ccb_status, "CCB" },
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{ report_jump_status, "Jump" },
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{ report_deco_status, "DECO" },
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{ NULL, NULL },
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{ report_jr_status, "Job Ring" },
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{ report_cond_code_status, "Condition Code" },
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};
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u32 ssrc = status >> JRSTA_SSRC_SHIFT;
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const char *error = status_src[ssrc].error;
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/*
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* If there is no further error handling function, just
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* print the error code, error string and exit. Otherwise
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* call the handler function.
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*/
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if (!status_src[ssrc].report_ssed)
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debug("%08x: %s:\n", status, status_src[ssrc].error);
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else
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status_src[ssrc].report_ssed(status, error);
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}
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