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https://github.com/brain-hackers/u-boot-brain
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81724e09a0
Add support for using the Atmel MCI driver on at91sam9263ek. This change is modeled after the existing at91sam9260ek support. Please note that this hooks up slot1 (MCI1) for SD. Not both. Tested with at91bootstrap and u-boot on dataflash in slot 0 and fat-formatted 8GB SDHC in slot 1 on first revision at91sam9263ek (which must use dataflash in slot0 to boot). CONFIG_ATMEL_MCI_PORTB not tested. Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se> [remove empty line] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
219 lines
6.1 KiB
C
219 lines
6.1 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2009-2011
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* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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* esd electronic system design gmbh <www.esd.eu>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/gpio.h>
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/*
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* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
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* peripheral pins. Good to have if hardware is soldered optionally
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* or in case of SPI no slave is selected. Avoid lines to float
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* needlessly. Use a short local PUP define.
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*
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* Due to errata "TXD floats when CTS is inactive" pullups are always
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* on for TXD pins.
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*/
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#ifdef CONFIG_AT91_GPIO_PULLUP
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# define PUP CONFIG_AT91_GPIO_PULLUP
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#else
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# define PUP 0
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#endif
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void at91_serial0_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
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at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* RXD0 */
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writel(1 << ATMEL_ID_USART0, &pmc->pcer);
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}
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void at91_serial1_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */
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at91_set_a_periph(AT91_PIO_PORTD, 1, PUP); /* RXD1 */
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writel(1 << ATMEL_ID_USART1, &pmc->pcer);
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}
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void at91_serial2_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */
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at91_set_a_periph(AT91_PIO_PORTD, 3, PUP); /* RXD2 */
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writel(1 << ATMEL_ID_USART2, &pmc->pcer);
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}
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void at91_seriald_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTC, 30, PUP); /* DRXD */
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at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
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writel(1 << ATMEL_ID_SYS, &pmc->pcer);
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}
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#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
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void at91_spi0_hw_init(unsigned long cs_mask)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_b_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
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at91_set_b_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
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at91_set_b_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
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/* Enable clock */
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writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
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if (cs_mask & (1 << 0)) {
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at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
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}
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if (cs_mask & (1 << 1)) {
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at91_set_b_periph(AT91_PIO_PORTA, 3, 1);
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}
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if (cs_mask & (1 << 2)) {
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at91_set_b_periph(AT91_PIO_PORTA, 4, 1);
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}
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if (cs_mask & (1 << 3)) {
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at91_set_b_periph(AT91_PIO_PORTB, 11, 1);
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}
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if (cs_mask & (1 << 4)) {
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at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
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}
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if (cs_mask & (1 << 5)) {
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at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
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}
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if (cs_mask & (1 << 6)) {
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at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
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}
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if (cs_mask & (1 << 7)) {
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at91_set_pio_output(AT91_PIO_PORTB, 11, 1);
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}
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}
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void at91_spi1_hw_init(unsigned long cs_mask)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTB, 12, PUP); /* SPI1_MISO */
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at91_set_a_periph(AT91_PIO_PORTB, 13, PUP); /* SPI1_MOSI */
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at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_SPCK */
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/* Enable clock */
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writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
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}
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if (cs_mask & (1 << 1)) {
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at91_set_a_periph(AT91_PIO_PORTB, 16, 1);
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}
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if (cs_mask & (1 << 2)) {
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at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
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}
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if (cs_mask & (1 << 3)) {
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at91_set_a_periph(AT91_PIO_PORTB, 18, 1);
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}
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if (cs_mask & (1 << 4)) {
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at91_set_pio_output(AT91_PIO_PORTB, 15, 1);
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}
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if (cs_mask & (1 << 5)) {
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at91_set_pio_output(AT91_PIO_PORTB, 16, 1);
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}
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if (cs_mask & (1 << 6)) {
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at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
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}
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if (cs_mask & (1 << 7)) {
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at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
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}
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}
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#endif
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#if defined(CONFIG_GENERIC_ATMEL_MCI)
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void at91_mci_hw_init(void)
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{
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/* Enable mci clock */
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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writel(1 << ATMEL_ID_MCI1, &pmc->pcer);
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at91_set_a_periph(AT91_PIO_PORTA, 6, PUP); /* MCI1_CK */
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#if defined(CONFIG_ATMEL_MCI_PORTB)
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at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* MCI1_CDB */
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at91_set_a_periph(AT91_PIO_PORTA, 22, PUP); /* MCI1_DB0 */
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at91_set_a_periph(AT91_PIO_PORTA, 23, PUP); /* MCI1_DB1 */
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at91_set_a_periph(AT91_PIO_PORTA, 24, PUP); /* MCI1_DB2 */
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at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* MCI1_DB3 */
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#else
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at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* MCI1_CDA */
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at91_set_a_periph(AT91_PIO_PORTA, 8, PUP); /* MCI1_DA0 */
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at91_set_a_periph(AT91_PIO_PORTA, 9, PUP); /* MCI1_DA1 */
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at91_set_a_periph(AT91_PIO_PORTA, 10, PUP); /* MCI1_DA2 */
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at91_set_a_periph(AT91_PIO_PORTA, 11, PUP); /* MCI1_DA3 */
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#endif
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}
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#endif
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#ifdef CONFIG_MACB
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void at91_macb_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTE, 21, 0); /* ETXCK_EREFCK */
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at91_set_b_periph(AT91_PIO_PORTC, 25, 0); /* ERXDV */
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at91_set_a_periph(AT91_PIO_PORTE, 25, 0); /* ERX0 */
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at91_set_a_periph(AT91_PIO_PORTE, 26, 0); /* ERX1 */
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at91_set_a_periph(AT91_PIO_PORTE, 27, 0); /* ERXER */
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at91_set_a_periph(AT91_PIO_PORTE, 28, 0); /* ETXEN */
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at91_set_a_periph(AT91_PIO_PORTE, 23, 0); /* ETX0 */
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at91_set_a_periph(AT91_PIO_PORTE, 24, 0); /* ETX1 */
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at91_set_a_periph(AT91_PIO_PORTE, 30, 0); /* EMDIO */
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at91_set_a_periph(AT91_PIO_PORTE, 29, 0); /* EMDC */
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#ifndef CONFIG_RMII
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at91_set_a_periph(AT91_PIO_PORTE, 22, 0); /* ECRS */
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at91_set_b_periph(AT91_PIO_PORTC, 26, 0); /* ECOL */
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at91_set_b_periph(AT91_PIO_PORTC, 22, 0); /* ERX2 */
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at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* ERX3 */
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at91_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ERXCK */
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at91_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ETX2 */
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at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ETX3 */
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at91_set_b_periph(AT91_PIO_PORTC, 24, 0); /* ETXER */
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#endif
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}
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#endif
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#ifdef CONFIG_USB_OHCI_NEW
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void at91_uhp_hw_init(void)
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{
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/* Enable VBus on UHP ports */
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at91_set_pio_output(AT91_PIO_PORTA, 21, 0);
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at91_set_pio_output(AT91_PIO_PORTA, 24, 0);
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}
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#endif
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#ifdef CONFIG_AT91_CAN
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void at91_can_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */
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at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */
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/* Enable clock */
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writel(1 << ATMEL_ID_CAN, &pmc->pcer);
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}
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#endif
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