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https://github.com/brain-hackers/u-boot-brain
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452f50f7cf
U-boot needs a host controller or "hose" to interact with the PCI busses behind them. This change installs a host controller during initialization of the coreboot "board" which implements some of X86's basic PCI semantics. This relies on some existing generic code, but also duplicates a little bit of code from the sc520 implementation. Ideally we'd eliminate that duplication at some point. It looks like in order to scan buses beyond bus 0, we'll need to tell u-boot's generic PCI configuration code what to do if it encounters a bridge, specifically to scan the bus on the other side of it. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
38 lines
1.3 KiB
C
38 lines
1.3 KiB
C
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/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _PCI_I386_H_
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#define _PCI_I386_H_
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#define DEFINE_PCI_DEVICE_TABLE(_table) \
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const struct pci_device_id _table[]
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void pci_setup_type1(struct pci_controller *hose);
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int pci_enable_legacy_video_ports(struct pci_controller* hose);
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int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
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void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
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u32 pci_get_rom_window(struct pci_controller* hose, int size);
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#endif
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