mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
e2597be5bc
On some boards using TI CPSW, it may be possible that PHY address was not latched correctly, and the actual address that the phy responds on is different from that set in device-tree. For example, see this problem report on beaglebone black: https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J Add support to check for this condition and use the detected phy address when its safe to do so. Also, add a public API that exposes the phy address of a given slave. This can be used to update device-tree that is passed to Linux kernel. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
60 lines
1.7 KiB
C
60 lines
1.7 KiB
C
/*
|
|
* CPSW Ethernet Switch Driver
|
|
*
|
|
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation version 2.
|
|
*
|
|
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
|
* kind, whether express or implied; without even the implied warranty
|
|
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#ifndef _CPSW_H_
|
|
#define _CPSW_H_
|
|
|
|
struct cpsw_slave_data {
|
|
u32 slave_reg_ofs;
|
|
u32 sliver_reg_ofs;
|
|
int phy_addr;
|
|
int phy_if;
|
|
int phy_of_handle;
|
|
};
|
|
|
|
enum {
|
|
CPSW_CTRL_VERSION_1 = 0,
|
|
CPSW_CTRL_VERSION_2 /* am33xx like devices */
|
|
};
|
|
|
|
struct cpsw_platform_data {
|
|
u32 mdio_base;
|
|
u32 cpsw_base;
|
|
u32 mac_id;
|
|
u32 gmii_sel;
|
|
int mdio_div;
|
|
int channels; /* number of cpdma channels (symmetric) */
|
|
u32 cpdma_reg_ofs; /* cpdma register offset */
|
|
int slaves; /* number of slave cpgmac ports */
|
|
u32 ale_reg_ofs; /* address lookup engine reg offset */
|
|
int ale_entries; /* ale table size */
|
|
u32 host_port_reg_ofs; /* cpdma host port registers */
|
|
u32 hw_stats_reg_ofs; /* cpsw hw stats counters */
|
|
u32 bd_ram_ofs; /* Buffer Descriptor RAM offset */
|
|
u32 mac_control;
|
|
struct cpsw_slave_data *slave_data;
|
|
void (*control)(int enabled);
|
|
u32 host_port_num;
|
|
u32 active_slave;
|
|
bool rmii_clock_external;
|
|
u8 version;
|
|
};
|
|
|
|
int cpsw_register(struct cpsw_platform_data *data);
|
|
int ti_cm_get_macid(struct udevice *dev, int slave, u8 *mac_addr);
|
|
int cpsw_get_slave_phy_addr(struct udevice *dev, int slave);
|
|
|
|
#endif /* _CPSW_H_ */
|