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https://github.com/brain-hackers/u-boot-brain
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9acaf60bfd
This patch enables SiFive UART driver for QEMU RISC-V emulation by implying SIFIVE_SERIAL on BOARD_SPECIFIC_OPTIONS. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
39 lines
636 B
Plaintext
39 lines
636 B
Plaintext
if TARGET_QEMU_VIRT
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config SYS_BOARD
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default "qemu-riscv"
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config SYS_VENDOR
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default "emulation"
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config SYS_CPU
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default "qemu"
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config SYS_CONFIG_NAME
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default "qemu-riscv"
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config SYS_TEXT_BASE
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default 0x80000000 if !RISCV_SMODE
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default 0x80200000 if RISCV_SMODE
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select QEMU_RISCV
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imply SYS_NS16550
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imply VIRTIO_MMIO
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imply VIRTIO_NET
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imply VIRTIO_BLK
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imply CMD_PING
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imply CMD_FS_GENERIC
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imply DOS_PARTITION
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imply EFI_PARTITION
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imply ISO_PARTITION
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imply CMD_EXT2
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imply CMD_EXT4
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imply CMD_FAT
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imply BOARD_LATE_INIT
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imply OF_BOARD_SETUP
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imply SIFIVE_SERIAL
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endif
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