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https://github.com/brain-hackers/u-boot-brain
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c7be3e5a79
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/*
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* Configuration for Amlogic Meson GXBB SoCs
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* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MESON_GXBB_COMMON_CONFIG_H
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#define __MESON_GXBB_COMMON_CONFIG_H
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#define CONFIG_CPU_ARMV8
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#define CONFIG_REMAKE_ELF
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_SYS_MAXARGS 32
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_SDRAM_BASE 0
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#define CONFIG_SYS_TEXT_BASE 0x01000000
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#define CONFIG_SYS_INIT_SP_ADDR 0x20000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE
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/* Generic Interrupt Controller Definitions */
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#define GICD_BASE 0xc4301000
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#define GICC_BASE 0xc4302000
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#include <config_distro_defaults.h>
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_addr_r=0x01000000\0" \
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"scriptaddr=0x1f000000\0" \
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"kernel_addr_r=0x01080000\0" \
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"pxefile_addr_r=0x01080000\0" \
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"ramdisk_addr_r=0x13000000\0" \
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MESON_FDTFILE_SETTING \
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BOOTENV
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */
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#endif /* __MESON_GXBB_COMMON_CONFIG_H */
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