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https://github.com/brain-hackers/u-boot-brain
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8069821fc2
Most armv8 systems have PSCI support enabled in EL3, either through ARM Trusted Firmware or other firmware. On these systems, we do not need to implement system reset manually, but can instead rely on higher level firmware to deal with it. The exclude list seems excessive right now, but NXP is working on providing an in-tree PSCI implementation, so that all NXP systems can eventually use PSCI as well. Signed-off-by: Alexander Graf <agraf@suse.de> [agraf: fix meson] Reviewed-by: Simon Glass <sjg@chromium.org>
43 lines
1.5 KiB
Plaintext
43 lines
1.5 KiB
Plaintext
if ARM64
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config ARMV8_MULTIENTRY
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bool "Enable multiple CPUs to enter into U-Boot"
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config ARMV8_SPIN_TABLE
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bool "Support spin-table enable method"
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depends on ARMV8_MULTIENTRY && OF_LIBFDT
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help
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Say Y here to support "spin-table" enable method for booting Linux.
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To use this feature, you must do:
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- Specify enable-method = "spin-table" in each CPU node in the
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Device Tree you are using to boot the kernel
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- Let secondary CPUs in U-Boot (in a board specific manner)
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before the master CPU jumps to the kernel
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U-Boot automatically does:
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- Set "cpu-release-addr" property of each CPU node
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(overwrites it if already exists).
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- Reserve the code for the spin-table and the release address
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via a /memreserve/ region in the Device Tree.
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config PSCI_RESET
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bool "Use PSCI for reset and shutdown"
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default y
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depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
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!TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
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!TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
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!TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
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!TARGET_LS1043ARDB && !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && \
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!TARGET_S32V234EVB
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help
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Most armv8 systems have PSCI support enabled in EL3, either through
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ARM Trusted Firmware or other firmware.
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On these systems, we do not need to implement system reset manually,
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but can instead rely on higher level firmware to deal with it.
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Select Y here to make use of PSCI calls for system reset
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endif
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