mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-23 03:19:43 +09:00
019df879a9
The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
55 lines
1.2 KiB
C
55 lines
1.2 KiB
C
/*
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* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mach/boot-device.h>
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#include <mach/sbc-regs.h>
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#include <mach/soc_info.h>
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static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF");
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switch (uniphier_get_soc_type()) {
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
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case SOC_UNIPHIER_PH1_SLD3:
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ph1_sld3_boot_mode_show();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
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case SOC_UNIPHIER_PH1_LD4:
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case SOC_UNIPHIER_PH1_PRO4:
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case SOC_UNIPHIER_PH1_SLD8:
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ph1_ld4_boot_mode_show();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
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case SOC_UNIPHIER_PH1_PRO5:
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ph1_pro5_boot_mode_show();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
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case SOC_UNIPHIER_PROXSTREAM2:
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case SOC_UNIPHIER_PH1_LD6B:
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proxstream2_boot_mode_show();
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break;
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#endif
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default:
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break;
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}
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return 0;
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}
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U_BOOT_CMD(
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pinmon, 1, 1, do_pinmon,
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"pin monitor",
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""
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);
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