mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-29 05:18:51 +09:00
![Simon Glass](/assets/img/avatar_default.png)
At present this driver is always included in SPL and TPL, if U-Boot proper enables it. Update the Makefile to provide full control using the existing Kconfig options. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: make the Kconfig help text a little bit clearer] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
21 lines
905 B
Makefile
21 lines
905 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
# (C) Copyright 2016 Cadence Design Systems Inc.
|
|
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
|
|
obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
|
|
obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
|
|
obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
|
|
obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
|
|
obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
|
|
obj-$(CONFIG_SYSRESET_MCP83XX) += sysreset_mpc83xx.o
|
|
obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
|
|
obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
|
|
obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
|
|
obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
|
|
obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
|
|
obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
|
|
obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
|
|
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
|